Help With Verilog Lab(Music Box)

[wuchy143]

Hi All,

I'm trying to use an FPGA(Spartan 3an Dev board) to make a music box. Basically it will have a 4-bit input to tell the module what note it needs to play. Once the module figures out what note it's being told to play it needs to generate a square wave output to a port pin which will connect to a speaker. This is actually a lab I found online as I'm trying to teach myself FPGA's. Check it out for reference if you'd like.

https://www.engr.sjsu.edu/crabill/lab2.pdf

It says that this all can be done with a multiplexer, counter, and a T-FF. I would like to get some direction as how to do this. Please don't give me the answer as that wont really help me. I haven't touched much digital stuff since college and am very rusty. Perhaps someone could generally explain how the pieces would work together and I can try to figure out the rest and write some code to it.

Thanks all!

-mike

 

[wuchy143]

So far I've come up with some thoughts....

There are going to be two main parts inside this module. 1st part will be responsible for figuring out what note the user wants to play. So it probably should be a 4--->16 mux to help decode the four input signals. I'm still trying to figure out how I can then take the output from the mux and do something usefull with it.

The second part will consist of a counter which will work with the clock to output the correct frequency to drive the speaker(square wave). Though I don't think I can figure out more of this part until I get further on the mux part of it all..

Am I on the right track? Any places I need to re-think?

-mike

 

[Wade Hassler]

A quick look at your reference tells me that one way to do this is:
Input bits select (via a ROM?) the terminal count of a counter of N-bits, where N will divide 50MHz down to 2x the frequency you want
Output is divided by 2 with one more flip-flop to give square wave out
Clock is enabled/disabled by 'hush'-input
Extra credit for making output cease without shortening the last pulse

 

[wuchy143]

Hi Wade. Thanks for the reply!

I think this makes more sense now. Let me peruse this and see what I come up with. I'll be back

 

[wuchy143]

oh and just as a clarification. The input bits are selected by the four on-board switches.(manual switches) I'm using the Spartan 3an dev board which obviously makes my life much easier when trying to learn this stuff.

 

[wuchy143]

To be clear I did a quick calculation to make sure I'm following you. Some math showing how you would get a 440Hz signal from a 50MHz clock:

*50MHz/440Hz = 113636.36(counter to make a 440Hz signal) ------> 113636 X 2 = 227272.7(counter to make a 880Hz signal) -----> this requires a counter of 18 bits correct?

Then once I get the 880Hz signal I can then feed that into my flip flop as the clock input and connect Q_not to the input of the D-FF. This will get the 440Hz out of that due to the nature of FF's dividing clock down by 2.

I think this is all making sense except how I would take in the 4 input bits. I know that a mux is probably involved but not really sure how to do it yet. Do you have any thoughts?


-mike

 

[wuchy143]

here is my block diagram of how I think it should work. Comments welcomed...

 

[BrownOut]

To be clear I did a quick calculation to make sure I'm following you. Some math showing how you would get a 440Hz signal from a 50MHz clock:

*50MHz/440Hz = 113636.36(counter to make a 440Hz signal) ------> 113636 X 2 = 227272.7(counter to make a 880Hz signal) -----> this requires a counter of 18 bits correct?

Then once I get the 880Hz signal I can then feed that into my flip flop as the clock input and connect Q_not to the input of the D-FF. This will get the 440Hz out of that due to the nature of FF's dividing clock down by 2.

I think this is all making sense except how I would take in the 4 input bits. I know that a mux is probably involved but not really sure how to do it yet. Do you have any thoughts?


-mike

50MHZ/880=56818.18. The I/O on your fpga won't drive a speaker directly.

 

[wuchy143]

haha oops. 56818 is the correct counter value. Thx. Brownout. Let me look into the speaker drive. I'm pretty sure I read somewhere that the spartan dev boards has a speaker drive circuit but now I'm not sure.

 

[wuchy143]

It has a headphone jack I can connect up to to hear the tones. Gotta love dev boards!

 

[BrownOut]

Make sure you include the headphone jack's connections in your .ucf file. Sure you already knew that

 

[wuchy143]

I did! Only thanks to your help from before