Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Help with adc datasheet

Status
Not open for further replies.

Mosaic

Well-Known Member
Hi all:I am trying to determine if this adc unit
https://www.electro-tech-online.com/custompdfs/2013/05/adc0820-n.pdf

will allow me to place several adc devices on the same 8 bit bus for data transfer to a PIC port.

I want to be able to have them sample at the same time (triggered by the PIC) but not compete for the data bus until the pic is ready to read each adc. I believe it can be done by 'enabling' a read using the individual RD lines but it isn't clear as the line serves more than one purpose.:confused:

Some advice pls!
 
From the datasheet it seems clear that the outputs can be tri-stated by use of the CS input. If CS is high there will be only ~0.1uA leakage from the outputs to the data bus. The CS input has to be held low for the RD line to be effective.
 
ok, thx.. so can i trigger several simultaneous samples BUT read them individually on the same PIC port...that is the challenge!
 
a conversion is started with the WR input
Connect all the ADCs together with the same WR signal

Pull the RD pin low one at a time.

There are two modes of operation! Read about the mode pin.
 
Ok so with WR-RD mode set....WR pulsed low starts conversion. About 1.5uS later INT goes low indicating sample rdy, port still tri-stated. Then a RD low brings the data to the port.RD hi tri-states the PORT again. Move on to the next ADC set RD pin, pulse low etc.
 
Nice part.

SPI though, not parallel, which will slow down the max sample read rate, and it will require sample & hold for each ADC which the TI adc includes.
 
Status
Not open for further replies.

Latest threads

New Articles From Microcontroller Tips

Back
Top