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Help needed to generate 50Hz Quasi square wave for H-Bridge

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abicash

Member
Hi

I am trying a seemingly simple task but somehow not able to manage it.

My resource :

4 channel PWM Microcontroller (Ch0 to Ch3)
I have a MOSFET H-Bridge which are named anitclockwise as A,B,C,D (A-B -> first limb , D-C -> next limb , A,D->upper)

Up until now i created an Edge-Aligned PWM signal and run the limb-sharing MOSFETs with complementary PWM. This works for a high frequency PWM , modulated over a low frequency.

Now i have to run the scheme at 50Hz . Which means, 10ms conduction for diagonal FETs each.
For this i generated a 10ms PWM signal and ran each limb in complementary mode.A Duty-cycle was calculated by an Analog channel and this Duty determined the Duty of the FETs.
Algorithm is thus

main
{
Read ADC;
Calculate Duty-cycle;
}

Timer Overflow
{
Channel0 = 0; // runs as complement of channel1 -- as upper MOSFET of limb1
Channel1 = Duty_cycle; //-- as Lower MOSFET of limb1
Channel2 = 0; // runs as complement of channel1 -- as Lower MOSFET of limb2
Channel3 = Duty_cycle; //as upper MOSFET of limb2

}

But with this scheme i observe that the variation of the ADC value changes the duty of only the positive envelope (as is inherent) of the o/p

Can someone suggest a method for mirroring the duty change in both positive and negative envelope?

I hope i am clear enough.

Thanks in advance and thanks for reading
 
I think I have this straight,

You have setup channel 0 and 2 to zero, so these o/p's will be continuously low, not the opposite phase to channel 1 and 3.

What you need to do (I dont know C well) is logically invert the adc value and dump that into the duty cycle control registers for channel 0 and 2.
I dont know if you understand assembler but this is what I'd do:

comf adval,w
movwf dutycycle_register

I think in C the operator to invert is !
 
Hello dr pepper

Thanks for your reply.
The Microcontroller has this feature of complementing the even numbered channels.So i update duty in odd numbered channels and automatically , the duty is updated as complement in the even numbered channel.
What i need is actually to drive the 2 limbs in 180 deg phase shift.
Which means that if i have a 90% duty, then upper MOSFET is on for 10% time and the lower MOSFET is on for 90% (with inherent dead band)
But i see that this scheme wont work. Since if i drive the 2 limbs i wint get equal distribution of the frequency in positive and negative peaks.

it will be somewhat like in attached text doc

whereas i want it to be equal on both sides
 

Attachments

  • wform.txt
    403 bytes · Views: 178
Hello

I have just now thought of a scheme.Have attached the waveform (w/ 10% duty)

1)I generate 2 nos of 50Hz complementary square-wave signals (fixed at 50% duty-cycle).Lets call these , A0 and A1
2)I generate another 100Hz Duty-cycle controlled square-wave signal . The Duty will be dependent on the ADC read value as earlier, but limited to 90%.Lets call this A2
3) I Logical AND -->A0 & A2 -- A1 & A2 . Lets call these signals as A3, A4
4) Now A3 and A4 are my drives. I just need to replicate them to get 2 more .So i have 4 drives for an H-bridge



Now i can see that i have to have 2 nos AND GATES at the o/p , but someone has ideas to control it in software?
 

Attachments

  • logic ana 1.pdf
    24.1 KB · Views: 187
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