praveen185
New Member
As part of our syllabus, we(group of 4) are planning to do a project in VHDL...we are final year students of electronics and communication department......We are new to VHDL...
we have to complete the project within a time period of 40 days.....So the poject must be not at all simple and not too difficult...we will be grateful to you if you suggest a new and good VHDL project..plzzzzzz help us.
thankzz..
we have to complete the project within a time period of 40 days.....So the poject must be not at all simple and not too difficult...we will be grateful to you if you suggest a new and good VHDL project..plzzzzzz help us.
thankzz..
