Help finding ADC

[ImperfectSeven]

Hi there, I need help finding a high speed ADC that meets the following specs:
at least 100MSPS
analog input range of at least 3V p-p
resolution is not a factor
preferably low power

So far the only one I have found is ADS5263 by TI
https://www.ti.com/lit/ds/symlink/ads5263.pdf

But with a price tag of 236.50 at 1k units I'm wondering if there is anything else.

Any help would be much appreciated

 

[Sceadwian]

Resolution is not a factor? So a 1 bit ADC is okay? Use an analog comparator...

For saying 'resolution is not a factor' you picked a 16bit ADC... Obviously resolution has to be a factor or you wouldn't have even considered a 16bit ADC..

 

[ronsimpson]

The ADS5263 is a quad part. Is that what you need? Its output is LVDS. Do you know what to do with LVDS. Do you want serial or parallel output?

A quick search of 8 bit, 1,2,or 4x ADC with a speed of 100 to 300mhz and "low power" gives me these.
KAD2708, AD9283BRSZ-100, MAX19506ETM, MAX19507ETM, AD9283BRSZ-RL100, AD9288BSTZ-100,

 

[ImperfectSeven]

Resolution is not a factor? So a 1 bit ADC is okay? Use an analog comparator...

For saying 'resolution is not a factor' you picked a 16bit ADC... Obviously resolution has to be a factor or you wouldn't have even considered a 16bit ADC..

The reason I chose the 16 bit ADC was because it was the only one that had an input range of at least 3V p-p (it actually has 4V p-p), and I guess I should say that I meant I need at least 8 bits resolution

The ADS5263 is a quad part. Is that what you need? Its output is LVDS. Do you know what to do with LVDS. Do you want serial or parallel output?

As long as I can connect the ADC to an MCU. I can also do with a single channel, like I said the only reason I posted the ADS5263 was because it had the analog input range I needed.

 

[ronsimpson]

because it was the only one that had an input range of at least 3V p-p (it actually has 4V p-p), and I guess I should say that I meant I need at least 8 bits resolution

Use a voltage divider to get the input range you want. A 1vp-p part can easily measure 100 volts with a resistor divider on the input. At 100mhz will also need to add capacitors into the divider much like a scope probe.

As long as I can connect the ADC to an MCU. I can also do with a single channel, like I said the only reason I posted the ADS5263 was because it had the analog input range I needed.

ADS5263.....What MCU has LVDS inputs? What MCU can input 16 bit data every 10nS? (100mhz) I did not go back and look at the ADS5263 data sheet but I believe the LVDS serial output is running at about 800mhz. Thats a bit every 1.2nS.

 

[ImperfectSeven]

the only reason I posted the ADS5263 was because it had the analog input range I needed.

 

[ronsimpson]

What MCU?

 

[ImperfectSeven]

I'm using a Cypress PSoC 3. I have found another ADC that will work if I compromise sampling speed here
Although it doesn't explicitly state what the data bus interface is I am assuming parallel based on the pinout. This should be fine, the only disadvantage I see with parallel is the number of
pins it requires.

 

[Nigel Goodwin]

Perhaps you should try posting what you're trying to do? - if it's a digital scope it's usual NOT to use micro's for the actual sampling (far too slow), but only to control the hardware.

 

[ImperfectSeven]

I am making a system that will detect the peaks of pulses coming from a radiation detector. Depending on the type of radiation (among other things) the amplitudes of the pulses are different. The goal is to accept a pulse as an input, determine its peak and store that value for later calculations. The pulses are about 5μs in duration and their frequency varies based on the amount of radiation. For testing purposes the frequency can be anywhere from 11Hz to 110kHz but the pulses are only 5μs in duration!
I am feeding the pulse into the PSoC where I amplify it (usually it is in the mV range) I then will go from the PSoC to the ADC and from the ADC back to the PSoC. From there I will determine the peak then use that to determine isotopes.

 

[Nigel Goodwin]

I am making a system that will detect the peaks of pulses coming from a radiation detector. Depending on the type of radiation (among other things) the amplitudes of the pulses are different. The goal is to accept a pulse as an input, determine its peak and store that value for later calculations. The pulses are about 5μs in duration and their frequency varies based on the amount of radiation. For testing purposes the frequency can be anywhere from 11Hz to 110kHz but the pulses are only 5μs in duration!

As the pulses are 5uS, and the maximum frequency only 110KHz why do you want 100MHz sampling?

 

[ImperfectSeven]

Because eventually it will need to be able to sample pulses that go down to 5ns
I do realize that even with 100MSPS the 5ns pulse won't be possible, but the idea is that I should be able to decrease the width of the pulses and not effect results.

 

[ronsimpson]

I think you need to decide where to peak detect.
DIGITAL: You need to sample 2 or 3 times within a pulse or you will miss a pulse. I think you need a FPGA to do the math and handle the high speed.
ANALOG: Make a peak detector that has a rise time in the order of 1 to 2nS and a hold time of ??? 100nS and then sample only when a peak is detected or every 100nS. Use a slower "CPU" and very small number of samples.

 

[ronsimpson]

A CPLD or FPGA can make a good digital peak detector. The CPLD might not be fast enough.

 

[ImperfectSeven]

I am working on a peak-hold circuit currently, however if I had a fast enough ADC I wouldn't need to worry about that correct?

 

[ronsimpson]

DIGITAL: I do not know much about your CPU but I will guess it runs 20M instructions/second. My guess is it can do peak detect in 5 to 10 instructions, if written in machine language and using 100% of the CPU power. So it should be able to make the software loop in 0.5uS. You are trying to capture a 5uS pulse so that is 10x oversampling and will work fine. This is running the ADC at 2mhz. Maybe you want a 5mhz ADC. This is very different than a 100mhz ADC.

If the CPU data path is 8 bit then only use a 8 bit ADC to keep the software speed up.

ANALOG: If you want to capture a 5us pulse then an analog peak detect with a 1 to 2us capture time should be easy to build inside the PSoC. I believe you can build one with an interrupt output that will interrupt the CPU when a pulse came in. When a pulse comes in the peak detect will hold the largest value and interrupt the CPU. The CPU through the slow internal ADC will read the value and then the CPU will reset the peak detector.

 

[ImperfectSeven]

I have already tried to to the peak-hold with the PSoC and it wasn't fast enough to find the peak, its gets even more difficult when the signal is aperiodic and the pulses may differ in shape.
Instead I am building an external peak and hold circuit then I will use the internal ADC with that so it should be able to give me the peak and miss very few (if any) pulses. Although I am having trouble with resetting the circuit =/

 

[ImperfectSeven]

Peak and Hold Circuit

Hi there, I am trying to build a peak and hold circuit that will capture the peaks of pulses that are about 5μs in duration or shorter. I can only test with 5μs pulses for now so that is what I am starting at. The pulse frequency can range anywhere from 1.1 Hz to 110 kHz. The amplitude also varies and is normally in the 1-50mV range but I am amplifying it using the PSoC so it is about 50mV - 900mV.

The goal is that once the peak is held I send it to an ADC converter internal to a PSoC 3. Once a couple of conversions have taken place and an end of conversion (EOC) trigger happens I will reset my peak and hold circuit using a MOSFET.

Currently this is the system I have in LTSpice:
View attachment 66051

This circuit has a couple problems, first off the peak it holds is higher than the actual peak:
View attachment 66052
(Green = input, Blue = output)

The second problem becomes more of an issue when this simulation becomes hardware. At the output of the first op-amp a second pulse can be seen when MOSFET turns off. In simulation this second pulse doesn't cause an issue, however in the real world this second pulse is larger than the input pulse and thus the peak and hold circuit peaks on that pulse. This is what I mean:
View attachment 66054
(Green = input, Red = Output, Blue = Output from 1st op-amp, Teal = MOSFET Gate input)

Right now my biggest problem is the 2nd one regarding the extra pulse when the MOSFET turns off (opens the connection between drain and source). Does anybody know why this pulse is created and how to get rid of it?

 

[Grossel]

peak detector

Hi.

A peak detector as shown **broken link removed** is probaby a better starting point.

A couple of zero crossing detectors could be put together to tell when to read the stored voltage and to send reset pulse to the pd.

 

[ImperfectSeven]

That circuit doesn't seem to be fast enough when using C1 = 10nF R1 = 100Ω and R2 = 1kΩ
View attachment 66060

Also to detect when to read the stored value I am using the PSoC. I have a pulse detection setup using a comparator. Once the comparator goes high it will trigger the SoC (Start of Conversion) for the ADC.
There is a delay in doing this so I need to be sure that I hold the peak long enough to actually start the ADC then take x readings.