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GNSS Receiver designed IC circuit noise issues

Hamada2you

New Member
Hello everyone
I wanted to share with you the design of a 2-layer full GNSS board that I have recently developed using Direct RF sampling architecture. The board consists of several blocks, each equipped with SMA input/output connectors, as well as an SMA connection between VCC and GND to check the noise. The board is designed to enable efficient processing of GNSS signals. The blocks are : 1. LNA , 2. 3xBGA amplifier blocks , 3. Splitter/3xBPF/Combiner, 4. Variable Gain Amplifiers (VGA). which are shown in Figures below:
1685776506535.png
1685776518070.png
1685776537126.png



One of the initial tests conducted involved checking each amplification stage using a single-tone signal at the GPS L1 center frequency of 1575.42MHz. The signal was intentionally set to a very low amplitude for testing purposes.

During the test, one notable issue arose when connecting the VCC using shielded cables to the BGA block. Even before turning on the VCC and RF , a signal was observed at the VCC SMA connection, as depicted in the following figure:

1685776135785.jpeg


when VCC in ON / RF OFF:

1685776555474.jpeg


Next test is in the output SMA VCC OFF/RF OFF :

1685776573978.jpeg


RF OFF/ VCC ON:

1685776592778.jpeg


This output makes no sense, its too much for amplifier no input its just amplified the noise, I still don't get it.

I would really like some suggestion regarding this issue.
 
The traces look rather narrow; have you properly sized them for 50 Ohm stripline and impedance matched everything, with appropriate ground stitching around components?
 
Any lack of grounding, stitching or impedance matching can leave lines / traces acting like resonant circuits and causing all sorts of odd failures and malfunctions or oscillations..

Are you using 0.8mm PCB? That could explain the narrow-looking lines.


Otherwise, are you sure you have calculated for a two layer board with a surface microstrip? That works out at near enough 2.5mm wide. The layouts look far narrower, possibly a width for a mid-layer embedded stripline?

See the calculator here:

Note the width of a 50 Ohm line in proportion to the size of the SMA connectors in this examples - about half the total space between the ground pins. It also demonstrates good ground stitching either side of the striplines.

A coplanar line such as this, with groundplane below and stitched at both sides, is less critical than an open one.


Stripline_PCB.jpg



The GNSS bands are in the range between the Amateur Radio 23cm and 13cm bands, so the same methodology and construction techniques should be used as for 23cm equipment.

I suggest you get a copy of the "Microwave Handbook"


ps. I'm not quite sure what your overall aim is? A GNSS receiver module such as made by UBLOX etc. can receive the full range of GNSS satellites with a single direct antenna connection.

This is the present satellite list from my fixed receiver setup that I use as an RTK base and time receiver (NTP) for my network; the number visible varies all the time, sometimes filling the screen.

A mobile RTK-enabled receiver (eg. for robotics experimentation) can then navigate with centimetre precision.

(I use a marine-style GNSS antenna mounted on the rear of the house roof, so it has a very good sky view).

GNSS_Sats.jpg
 
That does not show a ground plane layer? Aren't the impedances only valid if the opposite side is a ground plane?

The trace width and material thickness work out right for 50 Ohms, but only with an opposite ground plane and stitched grounds bordering the signal trace on the same side with 0.2mm lateral gaps.

With grounds a distance away, a few mm, the impedance would be far, far higher.
(No ground plane & 5mm to other ground puts it over 150 Ohms.)
 
Last edited:
As I said in my first post, ground stitching is critical. Small details can have massive effects at UHF / microwave frequencies.

From the amplifier data sheet:
The PCB top ground plane, connected to pins 2, 4 and 5 must be as close as possible to the MMIC, preferably also below the MMIC. When using via holes, use multiple via holes as close as possible to the MMIC.

You have single VIAs well away from the IC.

Compare your layout to what is given in the NXP data sheet - topside ground plane directly through under the IC, with three VIAs to the underside ground spread through the IC, and masses of stitching all around that area:

BGA2869_Layout.png


I think you need to look again at all the PCB layouts, with careful reference to the part manufacturers data sheets re. layouts & grounding etc.
 

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