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Gate Driver Limits

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dknguyen

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Hi. I was wondering something. THere's a MOSFET that has a switching time of 10ns. THis requires 3A drive current. Now the driver is able to provide 3A of current, however, the rise time of the driver is 125ns.

Does this mean that using this driver is although able to provide the necessary 3A for 10ns switch times, it is unable to meet the current demand quickly enough to make use of it? (ie. the FET turns on long before the driver ramps up enough current for 10ns switching).

It's a choice between a much weaker 3-phase driver IC with matched time propogation delays, or 3 much more powerful half bridge driver ICs. It's for a brushless motor 3-phase inverter and the transistor can switch super fast but I can't seem to find enough drive (although, I guess 30kHz PWM is more than enough...MHz PWM isn't overly useful for a motor...and I almost forgot about how short the wire would have to be to prevent transmission line effects.)

Actually does anyone know how to calculate the wavelength of an electrical signal down a wire given it's frequency?
 
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The rise time of 125ns for the driver means it will ramp up the gate voltage of the Mosfet in 125ns, causing it to switch "slowly" and therefore heat up a little. Each half-cycle of the 30kHz PWM is 15.6us so the ramp is only 8 thousandth of the total half-cycle time. The Mosfet might use only 1/4 of the ramp so its switching time will be 31ns.

Don't worry about it or find a faster driver.
 
Maybe I was a bit unclear. I'm wondering about the point where the current capability of the driver is outweighed by it's slow ramp time. AFter all, the whole point of having high drive current is to switch the FET on quickly but this is negated if the voltage ramp time is too slow. I'm a bit confused about where along the voltage ramp the driver delivers this peak drive current. Is it whenever the gate voltage exceeds the threshold?

The motor I have spins at a maximum of 14,000 RPM and has 14-12 poles. So the commutation switching needs to occur 9800 times per second to keep up with the motor. At this speed, each rotor pole spends 102us in alignment of a stator pole. Now suppose I wanted to be able to PWM during this time frame to control the voltage, I would like to be able to get at least 10 pulses in before commutation occurs. This doesn't make much sense since PWM in essence lowers the voltage thus slower down the motor and extending the time he rotor-stator pole remains in alignment, but I'm designing for worst case. So with all this, the pulse width needs to be 10.2us, resulting in a frequency 98kHz.
In additon, I have defined the shortest duty cycle possible to be 1% of the total pulsewidth and want the total transition time to be 1/10th the total pulse width. Therefore the transition time has to be 1.02us, and assuming equal rise and fall times, the switching time is 510ns.

The gate charge is 71nC, so I would need 139mA...that's odd. I got 1.42A every other time I did the calculation...which was why I was considering using 3 discrete drivers capable of 3A rather than the 200mA 3-phase driver. I guess the difference now is that the discrete driver has a ramp of 25ns while the 3-phase driver has a ramp of 125ns, which is quite a bit more significant vs the required FET switch time of 510ns.

Perhaps 98kHz this is needlessly high and I should be satisified with getting 2 pulses in before commutation and lower the frequency down to 20kHz since getting top speed (and this is under no load which is never the case in my application) while using anything less than 100% duty cycle is unachievable anyways. Reduce my switching losses and increase the ramp time to 2.55us and make the driver ramp insignificant.
 
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The total capacitance to be charged and discharged when switching a Mosfet involves the gate-source capacitance and the Miller dynamic capacitance which is caused by capacitive-coupled negative feedback from the drain to the gate.
 
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