The speed is limited to how long your ISR takes to handle the interrupt. If your ISR was just,
Code:
ISR bcf INTCON,INT0IF
retfie
Then it will take 7 cycles to complete and so in theory you could have an interrupt every 1.4uS.
In reality, you would normally have context saving (adds 8 cycles) and some useful code which would take you to a minimum of around 20 instruction cycles which is 4uS.
To work it out, count the cycles taken by your ISR and add 4 (for latency) and divide by 5 (for 20MHz).
Edit, in C you would have to look at the generated code.
Mike.