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External Battery for Ipod

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Zephyr

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Hey,

I'm planning to use two inputs for charging the battery inside the external charger - a solar panel providing a trickle charge, and a USB port for charging.

I'm going to be using this IC. Most pins I understand, except for CC. Is it supposed to be connected to battery positive to provide a trickle charge when it's full?
 
Most pins I understand, except for CC. Is it supposed to be connected to battery positive to provide a trickle charge when it's full?
It's 'charge control', and as you can see on page 2 of your datasheet, it goes low when you should disconnect the charge current from the battery and floats when you should connect charge current to the battery.

I would assume this would go to the enable line of your constant current circuit to the battery.
 
So it would require some sort of external circuit, like a not-gated transistor with a pull high resistor or something?

EDIT: No.

That's why I'm saying it goes to the positive side of the battery, along with .... CC is the charge output to the battery, isn't it?

So TM Low, LED to LED, battery to a voltage divider, VSS to ground, TS to a thermistor, VCC to the solar panel, INH to low.

Perfect, i'm such an idiot for not realising that CC was the output charge pin.
 
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Yep, something like that. You might be able to get away with using a resistor (in series with the transistor and battery) as the current limiter instead of using a constant current cct (which can be done with 2 transistors & 2 resistors).
 
Two ... transistors and two resistors?

Problem is, i'm trying to minimise power loss, as i'm using a solar panel as a trickle charger - a not gate will definitely dissapate too much.

EDIT:

How about a power op-amp and a resistor? I can't think of anything that allows current flow when gate is floating.

EDIT No. 2:

Remembered something from my H-Bridge building days. Would a P-Mosfet do? It conducts when pulled low, but stops conducting when pulled high. So I'll connect the gate of a PFet to CC, with a very high resistor (100kohm) pulling it down, and the source/drain to VCC and the battery.

Not using a PNP, high resistances.

Would that work?
 
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Two ... transistors and two resistors?
The standard constant current cct is 2 resistors & 2 transistors. In your case, you might need a few more, sorry.

How about a power op-amp and a resistor? I can't think of anything that allows current flow when gate is floating.
A transistor will allow more current than most opamps.

Would a P-Mosfet do? It conducts when pulled low, but stops conducting when pulled high. So I'll connect the gate of a PFet to CC, with a very high resistor (100kohm) pulling it down, and the source/drain to VCC and the battery.
You can use a PMOS, but not in that configuration - it would always be on as the gate is always being pulled low. You'll want to connect an inverter of some sort to the CC before the gate of the PMOS.

Attached is a rough sketch of a general idea for the transistor const-curr & the PMOS current-limited (by using a series resistor). I don't know what your voltages of any of your bits are - you should note that the chip you've chosen must be run from 5V.
 

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  • cc.png
    cc.png
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USB voltage is at a nominal 5v, and so will my rechargable battery, if I can get one that size.

Hm - I see. So your initial transistor is basically acting as a NOT gate, and your second transistor emits current.

What's wrong with the PFet alone? Doesn't CC pull high when current's supposed to go into the battery? So it'll conduct when CC goes Z, as the pull down resistor will pull the gate pin to ground, but when CC goes to high, the PFet will stop conducting?

EDIT: Re-read Data sheet. CC goes to low. Ah. Right. So that's what your first transistor is for.

So when CC goes to low, the current from the first resistor to the left sinks into CC, switching off the first NPN resistor. When it's high Z, the current flows into the transistor. The second resistor reading from the left is to limit the gate current into the PMOS, and Rlimit is to limit the current into the battery.

P.S. I think VSense requires two resistors acting as a potential divider.

Perfect, understood that diagram, I think. Poke me if I made any wrong assumptions.
 
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Yep, sounds like you've got it.

The second resistor reading from the left is to limit the gate current into the PMOS
The resistor is just a pullup to turn off the PFET (as the NPN can only turn it on in that configuration). Once off, there is no current into the gate. You probably already knew that...

P.S. I think VSense requires two resistors acting as a potential divider.
Yep, Vsense connects to the BAT pin through the resistor divider.

edit:
USB voltage is at a nominal 5v, and so will my rechargable battery, if I can get one that size.
And the solar panel? Is it just connected to the battery all the time?

There's not much headroom if charging a 5V battery from 5 volts... the pnp const current will be no good as it drops a fair bit of voltage. The PFET is OK, but the charge current will drop off fairly quickly which will slow down the charge.
 
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I think i'm just going to directly connect the solar panel to the battery with a schottkey diode. Solar panels simply don't generate enough current to damage the battery unless I go to the sahara or something. I wonder if there are constant voltage solar panels.

By the way, thanks a lot for helping clear up the misconceptions - I should've guessed that that tiny chip wouldn't be able to supply 1 amp.

EDIT: How about a small voltage booster chip? Wonder what those efficiencies are, and if it's worth it.


EDIT NO.2: Okay, so the battery charging circuit's done, time for the battery supply voltage itself. I'm planning to charge this thing via USB. Now USB gives a nominal 5 volts, ranging from 4.75 to 5.25 according to their specs. 5v NiCD battery (4 AAs in series?). So just use a MAX756 chip to boost the voltage high enough to charge the batteries, then another one to drop the voltage when charging ipod.

Is it just me, or am I making this too complicated?


Brainstorm session Fin.


NOTE:

So, due to the difficulty in sourcing a 5v NiMH battery, this is my plan.

When charging:
Solar cell tied directly to battery.
USB input tied to MAX756 chip, giving output voltage high enough to charge four NiMH batteries in series. Use above IC to control battery charge.

When discharging:
Battery connected to this IC, providing a high efficient stepdown to 5 volts. Batter positive terminal connected to SHDN of step-down IC by a few diodes and a resistor, providing shutdown when battery voltage too low.

... Is there an easier way?
 
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