Efficient SMPS Circuit for SPV Battery Charger

[HIZIBIZI]

I need to design a SMPS Circuit for 1 KWp Solar Photovoltaic Inverter. The Efficiency should be very high, preferably more than 95%. What basic rules should I follow? Also can anybody guide me to design a Synchronous Rectifier? I have designed Off line SMPS DC DC Converters (up to 700 Watts capacity) previously. But the efficiency I have got was hardly 85%.

 

[Robin2]

I have designed Off line SMPS DC DC Converters (up to 700 Watts capacity) previously. But the efficiency I have got was hardly 85%.

If you could provide details of this I would be interested.

 

[ronv]

If you go to National's web site you can use web bench to get the whole thing. 95% may be tough.

 

[HIZIBIZI]

Hi Robin2,
Following are the system design inputs,
1. Solar SPV Module - Synergy SRE200 series module, - 5 nos., 200 Wp each, Vmax - 27 Volts, Imax - 7.41 Amp. I intend to use them in series to reduce current rating of connecting conductors.
2. Battery Bank - I have calculated required battery bank capacity to be 24 Volts, 360 AH (rough estimate). We may use 48 Volts, 180/200 AH bank as this is nearer to standard available battery/cell capacity.

I have gone through some standard products in market. Here, modules are connected in parallel to get a 30 Volts max charging system to charge the 24 Volt battery bank where, standard 12 Volts, 180 AH batteries are connected 2in series and 2 in parallel. However as far as I know connecting batteries or cells in parallel is not recommended, as also the module to charger and charger to battery connectors are very thick. Moreover, The charging section, though called PWM charger, does not contain any inductor. I think they are basically simple ON/OFF controller to control the charging current. the Other problem is highly discontinuous battery current during current limit operation which reduces battery life. However, as the MOSFETs mainly operate in DC conduction region, they are highly efficient due to near zero switching loss. I intend to reduce the conductor size, hence the choice of higher module bank voltage, battery bank voltage is higher as I can use standard batteries/ cells in series, and a proper SMPS charger to provide continuous current even at current limit. However, the efficiency must be high to compete with the normal charger available in market. I also think using SMPS charger along with a Microcontroller (which is available at hand to control the Sine wave inverter circuit) can ultimately result into design of a MPPT charger. The control technology can be developed. But the bottom line is the Efficiency of the charger.
Can you help me in any way.

 

[HIZIBIZI]

This is in addition to my earlier post.
So my system requirement is as follows, -
I/P - Voc 32.83 x 5 = 164.15 V, Vmp = 27 x 5 = 135 V.
O/P - Vbank = 44.4 V min to 64 Volts (boost charge), 56.4 Volts (trickle) current limit 18 to 20 Amperes.
I intend to use buck converter as this will reduce one switch and one diode (w. r. t. normal half bridge), this should reduce conduction losses, one magnetic component (x'mer w. r. t. h b) which will reduce magnetic losses, and operate around 15 to 20 kHz to reduce switching losses.

 

[HIZIBIZI]

Thanks. But WEBENCH does not have solution for this power level

 

[Robin2]

Hi Robin2,
Following are the system design inputs,

Sorry, I have no advice to offer. I am hoping to learn about the DC DC converters you have already made.

 

[Warpspeed]

Buck converter should work fine.

Ninety five percent is doable, but it will take some large and expensive components to keep the conduction losses very very low.
The main difficulty will be the switching device, when "on" will need to charge the inductor up to the full 36 Amps, but the solar panels can only source 7.4 Amps.

So you will need a giant capacitor bank between the 135V panels and your buck regulator.

That way, the capacitor bank charges pretty constantly at 7.4 Amps, but it can supply the huge current peaks demanded when the buck regulator switching device turns on, without dragging the buck regulator input voltage down excessively. I suspect that will be your major source of efficiency loss.

Never forget that a buck regulator is either totally off, and drawing zero current, or sourcing the FULL heavy dc output current to keep the inductor current flowing at the output value.

A much nicer way to do it would be to build several smaller buck regulators and run them at the same frequency, but out of phase with each other.
That way, the input current peaks either are sequential, or overlap to a degree, but the very heavy current pulsing at the input will be much reduced.

It also gives you a bit of redundancy. Try building maybe one 200 watt module.
Get it working as efficiently as you possibly can with a bit of experimentation, then build four more (plus a spare?).
That is how I would do it.

 

[HIZIBIZI]

Dear Warpspeed,

Thanks for the suggestion. What you are suggesting is interleaved buck converter with 5 stages. I have done some survey after your post and found Tim Hagerty's article in EE times on the subject most helpful. I shall come back to you after doing some calculation. In the mean time any other suggestion will be highly appreciated.
Thanks again and regds

 

[Warpspeed]

Thanks for the suggestion. What you are suggesting is interleaved buck converter with 5 stages. I have done some survey after your post and found Tim Hagerty's article in EE times on the subject most helpful.

I could not locate that article, but that is the general idea.
There is no particular magic in five stages, you can have any number, but smaller stages mean a much more manageable size for the inductor and fewer current sharing problems.
For designing the inductor, a powdered iron toroid would be my choice, and Micrometals have some excellent free on line software to greatly simplify the design process.
**broken link removed**

 

[HIZIBIZI]

Find the article in the following two URLs,-

**broken link removed**

**broken link removed**

As for the magnetics, I use EPCOS N87 grade EE cores for inductors. I use inductor design procedures given in standard literature. They give pretty impressive results.

 

[Warpspeed]

That is a particularly good article.
The simplest way to generate sync pulses for a larger numbers of clock phases is probably with a Johnson, or twisted ring counter.

The optimum choice of core material depends on the application.
Gapped ferrite would be better for higher input voltages and higher switching frequencies because of lower ac core losses under those conditions.
Powdered iron may be a better choice for higher dc currents at lower voltages and lower switching frequencies, because of the far higher dc magnetic saturation value.

It mostly depends on trading off ac core, and dc copper losses, under whatever ac and dc conditions start to become the limiting factors in the particular design.

 

[HIZIBIZI]

I am working on the design of the system. I am having trouble with choice of low rds(on) MOSFETs working at 135 Volt system. Testing a 135 Volt/200 W system with solar modules is also costly. I may opt for lower system voltage.

 

[Warpspeed]

If you assume say a one volt drop at six amps, that requires an Rdson of 0.167 ohms, (that adds a conduction loss of only 0.75%).

How about something like an IRFP37N50 ?
http://www.datasheetcatalog.com/datasheets_pdf/I/R/F/P/IRFPS37N50A.shtml
It would be practically indestructible at your power level, and you only need one device per module.

 

[HIZIBIZI]

Sorry Warpspeed, I had to deviate from this project. I built a PIC16f877a based AH meter in the mean time. However I am getting back to this one.

 

[Warpspeed]

No problem.
I am still right here.

 

[RCinFLA]

A conventional buck probably won't get you that efficiency with duty cycle required for 135v input to 44v output. You would have to do a transformer conversion like a push-pull smps to get the conduction percentage up on the MOSFET's to get the efficiency up. You use the transformer to do this.

You could probably do 92-93% with a conventional buck switcher. Even if you get low Rs MOSFET and real good coil the low Rs MOSFET's come with greater gate driving capacitance so you will eat into efficiency due to gate drive power.

 

[ronsimpson]

Ground is relative. There is no law that says the negative lead of the solar cell has to be at ground. The positive lead could be at ground. The positive lead could be at +44V.

The buck supply on the left, the gate is hard to drive.
The buck on the right, the gate is easy to drive.

(many parts are missing to make the picture simple)

 

[Warpspeed]

A conventional buck probably won't get you that efficiency with duty cycle required for 135v input to 44v output.

Yes it can, if the conduction losses are made low enough.
That is just a matter of making both the inductor and the switching devices large enough.

There is no minimum limitation on ohmic resistance, if you just keep adding copper and silicon to the problem.

Gate drive power and inductor core ac losses are both frequency dependant, these too can be kept minimal by using a low switching frequency.

It is not that difficult, it just requires larger components and more dollars.
But possible it certainly is............

 

[ronsimpson]

you are suggesting interleaved buck converter with 5 stages.

Because the duty cycle will be close to 30% you could use 3 or more smaller buck supplies running interleaved. This way the input current ripple will be small.
If one power supply the input ripple is about 22A. If three power supplies running at 33.3% then the ripple could be 1A or less