eagle schematic ERC problem

[hamsiii]

I have designed a circuit in Eagle 5.8.0 Professional, however when I tried to make an electrical rule check, there are almost 400 errors shown on the list. When I look at the errors, there are no problems in my circuit but only seems to have error. How can this be possible? I wanted to make a PCB design, but I could not, due to the unconnected pins and wires. Please help me to find a solution to avoid this. Thank you.

ps. Some pictures are given for you to examine the errors.

View attachment 63459
View attachment 63460
View attachment 63461

 

[3v0]

You have run past the actual connection point causing a missed connections. Make the pins visible so you know where to connect then erase each overlapped trace and connect it to the pin. Try routing from the pin back to a trace instead of the trace to a pin if possible.

Try fixing one and if that works do the others.

 

[kubeek]

Use the Eye tool to see what is connected where, you will find that none of those 400 pins are connected properly.
The basic problem is that you´re using too fine grid.

 

[DerStrom8]

Did you switch grid size in the middle somewhere? If not, then I agree with kubeek--you need to make it a little more coarse. Otherwise, you'll need to figure out the original grid size and change it back, and THEN re-connect it. Zooming way in on the pin to be connected will help if you are using a fine grid.

 

[jpanhalt]

A common cause or contributor to that problem is when you use the "wire" command to connect components. Use the "net" command. It will help eliminate such overlaps.

If you want to prove it to yourself, "wiggle" the components, and you will see how the wire is connected. Then use "net" and you will see the difference.

John

 

[meowth08]

I'm not sure with this.

Try going back to schematic and click on display layers. Highlight "pins". You will notice that a circular green thing is on the endpoint terminals of the components. I think it's layer 91 or 92 , not sure. Maybe you have picked the wrong component from the list. Maybe a dummy.. In case the other members who know well eagle verified that my post is wrong, just ignore this post. I am only sharing something I experienced before when I was making schematics for my projects.

Regards,

meowth08

 

[3v0]

I did an experiment. I removed a schematic line created with NET and replaced it with a line created with WIRE. It resulted in the overlap and missing connection errors.

Pins are on 93.

 

[jpanhalt]

Newer versions with enhanced "snap to's" may solve some of those difficulties with using "wire" instead of "net" for connecting components.

In my mind, it is part of the personality of Eagle that one grows to love, like the difference between "cut" and "copy" in versions <6.0. I happen to like the "cut" dialog better and reverted my 6.x version to still use it.

John

 

[3v0]

Why would one use the WIRE tool instead of the NET tool ?

 

[jpanhalt]

Don't know. Why would one start using a program before thoroughly reading and studying the manual? I guess maybe I am the only one here who ever did that. Fortunately, I started using Eagle many years ago (ver. 3.x) and now have a complete catalog of almost every stupid mistake that can be made.

I suspect translation of whatever the original German word was to "wire" unintentionally created the additional meaning of "connect," as in electrical connection. Follow that with more translation to whatever the natural language of the user, and you have potential confusion.

Here's another example we see occasionally on ETO. At first, Eagle looks like just a graphical drawing program, not the command language it is. So, you can draw colored areas using the rectangle tool, etc. that look just like copper pours and signal nets. They will work like copper pours too, if you make your own boards. But, they are not the same.

Similarly, using "wire" will produce a schematic that looks right, at least until one tries to make a PCB from it. Then all of those unconnected "wires" create problems.

The OP has not responded, but I suspect he used "wire" to get all of those unconnected pins, particularly since he was using a late version like 5.8. I am glad he brought the issue up here. Maybe one or two more Eagle users in the world are still doing that same thing.

John

 

[Boncuk]

I suggest to redraw the entire schematic using only ONE grid size.

The frames you drew around the parts of the schematic show clearly that you obviously changed grid size to some odd values. (black lines either layer 95 or 96)

Use grid sizes of 0.1" and 0.05" only (the latter only if there are space issues on the sheet).

When "showing" (eye symbol) with the pins layer (93) activated not only the net and the green circuit should be highlighted, but also the red part of the pin.

Switching from grid size 0.1 to 0.04" you'll get self produced errors for the remainder of the circuit schematic!

Nothing will fit anymore!

Check out the screenshot for proper connections.

Boncuk

 

[DerStrom8]

I suggest to redraw the entire schematic using only ONE grid size.

The frames you drew around the parts of the schematic show clearly that you obviously changed grid size to some odd values. (black lines either layer 95 or 96)

Use grid sizes of 0.1" and 0.05" only (the latter only if there are space issues on the sheet).

When "showing" (eye symbol) with the pins layer (93) activated not only the net and the green circuit should be highlighted, but also the red part of the pin.

Switching from grid size 0.1 to 0.04" you'll get self produced errors for the remainder of the circuit schematic!

Nothing will fit anymore!

Check out the screenshot for proper connections.

Boncuk

I agree completely. NEVER change the grid size in the middle of a schematic, unless you REALLY know what you're doing. It can mess up your entire schematic if you change it.

 

[jpanhalt]

Can't disagree about the advice on not changing grid size, but if you really need to do that, just be sure you use a common denominator in the fine/alternate grid setting. That is, if your two major grid sizes are 1.0 and 1.2 mm (example!), then the fine should be 0.2 mm, 0.1 mm (preferred over 0.2, as it allows a center for each major division), 0.05 mm, etc.

There is no practical limit to the number of grid sizes you can use, if that rule is followed. For the fine grid, I use the largest value that will get the precision I need. I have used multiple grids mostly when making packages for new devices. I don't think I have ever seen the need to change grid size when making a schematic.

Edit: The foregoing example used metric as that was the system used with the component for which I had to use muliple grid sizes to get the right footprint easily. It is meant solely as an example of what I meant by common denominator. In no way do I recommend multiple grids or metric for a schematic for the reasons pointed out by Boncuk, below, and myself, above. Since the OP had not returned to the thread, and the discussion had become more generalized, I though adding this small additional hint on using multiple grids might help others who had not done it before.

John

 

[Boncuk]

Can't disagree about the advice on not changing grid size, but if you really need to do that, just be sure you use a common denominator in the fine/alternate grid setting. That is, if your two major grid sizes are 1.0 and 1.2 mm (example!), then the fine should be 0.2 mm, 0.1 mm (preferred over 0.2, as it allows a center for each major division), 0.05 mm, etc.

There is no practical limit to the number of grid sizes you can use, if that rule is followed. For the fine grid, I use the largest value that will get the precision I need. I have used multiple grids mostly when making packages for new devices. I don't think I have ever seen the need to change grid size when making a schematic.

John

Hi John,

sorry, but I completely disagree with a metric grid dominator you'll already have messed up the schematic drawing to an extend of 100%.

Eagle symbols, if depicted from an Eagle library are inch dominated, most of them based on a grid size of 0.1" which equals 2.54mm. Using even metric values is the worst thing you can do drawing a schematic.

So the initial grid size has to be 0.1" or if you use a metric scale it's 2.54mm. Using a grid size of 1.27mm (0.05") the schematic is still well readable. Any lower scale will create confusion when reading.

Regards

Hans

 

[DerStrom8]

Can't disagree about the advice on not changing grid size, but if you really need to do that, just be sure you use a common denominator in the fine/alternate grid setting. That is, if your two major grid sizes are 1.0 and 1.2 mm (example!), then the fine should be 0.2 mm, 0.1 mm (preferred over 0.2, as it allows a center for each major division), 0.05 mm, etc.

There is no practical limit to the number of grid sizes you can use, if that rule is followed. For the fine grid, I use the largest value that will get the precision I need. I have used multiple grids mostly when making packages for new devices. I don't think I have ever seen the need to change grid size when making a schematic.

Edit: The foregoing example used metric as that was the system used with the component for which I had to use muliple grid sizes to get the right footprint easily. It is meant solely as an example of what I meant by common denominator. In no way do I recommend multiple grids or metric for a schematic for the reasons pointed out by Boncuk, below, and myself, above. Since the OP had not returned to the thread, and the discussion had become more generalized, I though adding this small additional hint on using multiple grids might help others who had not done it before.

John

I would agree about that if you had it in standard grid. In metric, that would mes it up, as Hans mentioned.

 

[jpanhalt]

I would agree about that if you had it in standard grid. In metric, that would mes it up, as Hans mentioned.

I don't quite understand what you mean. Of course, the component symbol is standard inch grid. The component package can be metric. How does that "mess" it up?

See this example for an LGA66 component: https://www.electro-tech-online.com/threads/eagle-footprint.126185/

Drafting that LGA footprint was greatly facilitated by using metric grids on which or to which each pad could either be centered or easily referenced. In terms of routing, it makes no difference. If you want to see the traces exit on-center for the pads, that is easily done. Note: There is different pad spacing for the inner and outer pads as well as different pad spacing around the antenna pad.

John

 

[DerStrom8]

I don't quite understand what you mean. Of course, the component symbol is standard inch grid. The component package can be metric. How does that "mess" it up?

No, it's not the component package metric measurements that would mess things up. It's the scaling of the grid size in metric. It makes it much more difficult and could really mess up the connections. Scaling in standard measurement wouldn't be a problem.

 

[jpanhalt]

When you go from schematic to board, Eagle doesn't care what the grid is/was. It makes the connections regardless.

Clearly, I do not understand what you mean. Can you give an example?

John

 

[DerStrom8]

When you go from schematic to board, Eagle doesn't care what the grid is/was. It makes the connections regardless.

Clearly, I do not understand what you mean. Can you give an example?

John

If you start working on a schematic with a specific metric grid (let's say it's approximately 2.54mm, or 0.1"), and you try to scale it to make it slightly more fine, you'd have to be very careful to scale it PERFECTLY (example, cut it exactly in half), which is more difficult with metric values than with standard values (considering the components are all in standard).

 

[jpanhalt]

I thought it was clear that I was not talking about the schematic!

I don't think I have ever seen the need to change grid size when making a schematic.

In no way do I recommend multiple grids or metric for a schematic for the reasons pointed out by Boncuk, below, and myself, above.

Of course, the component symbol is standard inch grid.

John