Dumb Question about MOSFETs

[poopeater]

I was looking at some datasheets today, and every single FET I came across had a diode included as part of the circuit symbol. Is this diode an intrinsic property of all FETs? I'd like an enhancement-type n-channel FET with no diode. Does anyone have a recommendation?

This link shows the circuit symbol that I am talking about. Why is that diode in there??!?!

**broken link removed**

 

[audioguru]

The diode is part of the manufacturing of every Mosfet. It is a huge and very powerful diode but it is very slow. It is actually a very powerful zener diode because it has avalanche breakdown at a little above the voltage rating.

Why do you want to operate a Mosfet backwards?

 

[poopeater]

Is the diode put there on purpose? If so, why? What purpose does it serve?

I don't want it there at all. I had wanted to use a FET to isolate a battery pack from a solar panel to prevent the battery from discharging into the panel at night. I was thinking that using a FET would allow me to get rid of the 0.7V drop across the diode. With that diode there, it is allowing the battery to discharge into the panel.

 

[Hero999]

Is the diode put there on purpose? If so, why? What purpose does it serve?

Read the above, a diode is a byproduct of the manufacturing process.

I don't want it there at all. I had wanted to use a FET to isolate a battery pack from a solar panel to prevent the battery from discharging into the panel at night. I was thinking that using a FET would allow me to get rid of the 0.7V drop across the diode. With that diode there, it is allowing the battery to discharge into the panel.

Connect two MOSFETs in series with the drains or sources facing each other and the gates tied together. Don't worry about the source and drain connections being the wrong way round on one of them as the diode will just be short circuited when the transistor is turned on.

it has avalanche breakdown at a little above the voltage rating.

Most rectifiers do this, contary to popular belief they're not easilly destroyed by overvoltage providing the current it limited to a safe value, the same goes for red and IR LEDs but the other colours seem to be destroyed when subjected to excess reverse voltage.

 

[Rapter_F22]

yes the diode is put there on purpose. It is often refered to a free wheeling diode. there are many uses for it, e.g. bridge converters, motor control. if you want to now more about them look for topics under power electronics.

 

[Hero999]

No it isn't put their on purpose, it's an integral part of the die, it's a byproduct of the manufacturing process, read the above!

 

[dknguyen]

yes the diode is put there on purpose. It is often refered to a free wheeling diode. there are many uses for it, e.g. bridge converters, motor control. if you want to now more about them look for topics under power electronics.

The diode drawn in series (edit: parallel, not series) with the MOSFET is intrinsic. It is NOT PUT THERE ON PURPOSE. Freewheeling diodes are put in parallel with MOSFETs to protect them from voltage spikes in H-bridges, but the intrinsic/parasitic diode is too slow to do any good, so an external high-speed diode is put in parallel with the MOSFET. They are NOT the same thing, but are connected in the same way.

 

[Hero999]

The diode drawn in series with the MOSFET is intrinsic.

You've got that backwards, the built in diode is in parallel with the MOSFET.

 

[dknguyen]

You've got that backwards, the built in diode is in parallel with the MOSFET.

my mistake.

 

[ThermalRunaway]

I have another dumb question about MOSFETS. I was working on an RF Power output stage the other day, and I suspected one of the power MOSFETS were faulty. I looked up it's datasheet and it's an N-type Enhancement mode component. My understanding of an Enhancement mode MOSFET is that when you apply bias to the gate, you attract majority carriers which "enahnce" the channel - in other words make it wider. In so doing, you decrease the channel resistance, which causes more current to flow. With a depletion mode MOSFET, the opposite would apply. If you apply bias to the gate you attract majority carriers which depletes the channel - in other words makes it smaller and so increases the resistance between drain and source and causes less current to flow.

I measured the resistance between drain and source with the suspected component removed, and it was an open circuit. Going on the understanding I have above, I figured this to be correct but I've often had trouble diagnosing FETs and I've found that the only real way to check for sure if an FET is faulty is to replace it. So I did that, but before fitting the new one in I measured the resistance between drain and source and it was low resistance! Without any bias applied, I'd have expected an open circuit.

This has thrown my entire understanding of MOSFETS into the bin. Am I confusing something here?

Brian

 

[Roff]

I have another dumb question about MOSFETS. I was working on an RF Power output stage the other day, and I suspected one of the power MOSFETS were faulty. I looked up it's datasheet and it's an N-type Enhancement mode component. My understanding of an Enhancement mode MOSFET is that when you apply bias to the gate, you attract majority carriers which "enahnce" the channel - in other words make it wider. In so doing, you decrease the channel resistance, which causes more current to flow. With a depletion mode MOSFET, the opposite would apply. If you apply bias to the gate you attract majority carriers which depletes the channel - in other words makes it smaller and so increases the resistance between drain and source and causes less current to flow.

I measured the resistance between drain and source with the suspected component removed, and it was an open circuit. Going on the understanding I have above, I figured this to be correct but I've often had trouble diagnosing FETs and I've found that the only real way to check for sure if an FET is faulty is to replace it. So I did that, but before fitting the new one in I measured the resistance between drain and source and it was low resistance! Without any bias applied, I'd have expected an open circuit.

This has thrown my entire understanding of MOSFETS into the bin. Am I confusing something here?

Brian

you only got half the depletion mode thing right. Depletion occurs in an N-channel depletion mode MOSFET when you apply a negative bias to the gate, relative to the source. They are normally on with zero volts bias. You have to apply a negative voltage to turn them off.
The problem with testing MOSFET is that the gate is a very high impedance. It looks like a capacitor. Whether it is on or off or anywhere in between depends on the charge on the gate. To test it, you have to control the gate-to-source voltage. You can't just let it float.

 

[ThermalRunaway]

you only got half the depletion mode thing right. Depletion occurs in an N-channel depletion mode MOSFET when you apply a negative bias to the gate, relative to the source. They are normally on with zero volts bias. You have to apply a negative voltage to turn them off.
The problem with testing MOSFET is that the gate is a very high impedance. It looks like a capacitor. Whether it is on or off or anywhere in between depends on the charge on the gate. To test it, you have to control the gate-to-source voltage. You can't just let it float.

Ok you've answered one question for me, but created another. My understanding was that with a depletion mode n-channel MOSFET, depletion occurs when you apply a positive bias between source and gate. The opposite would apply with a p-channel depletion mode MOSFET, where depletion would occur when a negative bias is applied.

Am I incorrect here then??

Brian

 

[Roff]

See this explanation of how a **broken link removed** works. Since the channel is N-material, it requires a negative gate voltage to deplete it (increase the resistance). A P-channel would require a positive gate-to-source voltage to achieve higher resistance.
I like to think of depletion mode as being the same as enhancement mode, except the threshold voltage is negative (for N-channel). Enhancement mode and depletion mode both form inverters in the common-source configuration.

 

[ThermalRunaway]

It seems to me that my understanding is the same as yours, only I've got the N-channel and P-channel types the wrong way around with respect to the polarity of the bias they require to operate.

Brian