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dsPIC Latch Question

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burg

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Hey,

I've just got a very simple question. Whats the reason behind using a latch (LATx) in the dsPIC versus just using the PORTx command?

What benefits does it offer?

Thanks.
 
It corrects a bit of a bug with using the PORTx register. The problem arises from the fact that a read from an output port using PORTx reads the actual logic levels on the pins themselves. So if you have an open drain pin that is driven low by external logic but the open drain transistor is turned off (Should be high but is low) and you use the MOVLW 0xFF and XORWF PORTx, F instructions to toggle the open drain transistor, then nothing will happen. Using the LATx register double buffers the io operation so that read/modify/write instructions work properly by reading from an internal register and not the logic level on the pin.
The same issue can happen on ports with a mix of inputs and outputs where one or more pins are switched from input to outputs and back again and read/modify/write instructions are used on these ports.
 
So it's basically a more reliable way of insuring the pins are dealt with correctly, getting the proper information across?

Thanks a lot, your answer was just what I was looking for.
 
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