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Driving a 7-segment with just NANDS

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epcd

New Member
Hi all,

I've got a little project on my hands at the moment and I need a bit of help with the design. The overall project is a dice, it displays a random number between 1 and 6. The output of the random number circuit is a 3 bit code (A, B and C).

At the moment I'm going to represent say 6 with the binary value 110 (A=1 B=1 C=0)

I'm trying to design a combo logic circuit to drive a 7-segment display. The circuit I need to design is the decoder for the display.

So I've got my truth table...


(a-g are the display inputs - a logic 0 turns the relevant part of the display on)

Past this and I'm stumped :oops:

As in the topic title I have to keep this design to just NAND gates and inverters. Specifically the 74LS04 (inverter) and the 74LS00 (NAND)

Anyone got any ideas? :?:
 

Gandledorf

New Member
Why must it only be NAND gates? Is this an intro project where they prove that you need nothing but NANDs? If so it seems overboard. You can do it, and it is easy, but it will take a lot of gates.
 

John Sorensen

New Member
If you're using the 7400 you don't need the 7404's, as the NAND is a "universal" gate, and easily made into an inverter.

BTW, I wouldn't want to do this project!

j.
 

epcd

New Member
Gandledorf said:
Is this an intro project where they prove that you need nothing but NANDs?
Yeah, you get the idea. The 74LS00 contains 4 x 2 input NANDS and the 74LS04 has 6 inverters.

I think I need to create a karnaugh map from my truth table and do some simplification and boolean algebra but unfornatuantly I'm a bit rusty with all those topics.

If anyone can assist further feel free to PM or reply :)

Regards
 

epcd

New Member
I have found an initial diagram that would almost give the result I am looking for. The only difference is this is using AND, OR and NOT gates rather than NAND and NOT gates. I think this diagram might be for a BCD input and I only need a 3 bit input.

Click HERE to view.

Arrrhhh someone help me! Please, I'm really confused!

If you need any clarification of the problem then please ask :wink:
 

Russlk

New Member
You are not going to learn anything if we do this for you. Here is a suggestion: Break the problem down to 6 circuits (one for each digit), then OR the outputs. HINT: the NAND is an inverted OR.
 

crust

Member
It is important to realize that the NAND gate is functionally complete. This means that a circuit represented with ORs/ANDs/NOTs can be constructed entirely out of NAND gates. Perhaps that will help you on your project.
 

epcd

New Member
Thanks crust - I'm working on drawing a karnaugh map at the moment.

Can anyone tell me if this is correct... because the display segments are activated by a logic 0 am I right in thinking I should use POS rather than SOP in my karnaugh maps?
 

crust

Member
Perhaps I am not understanding your question, but in your k-map, if you need a logic-0 to be the true condition, why not just box those and write your SOP terms.
 
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