DMA CLarification

[dknguyen]

I am a bit confused about what happens when a DMA is not used. I know that it allows data from a periphreal device to be written to/from memory without the CPU having to think about it. But I was wondering what steps must happens when a DMA is not used- the steps that the CPU must take to "conciously" write, say, an ADC reading to memory.

 

[Papabravo]

Peripheral I/O

In this context there are two things that might be going on. In the first case assume that the processor has a flat linear address space. This address space contains both memory and peripherals. So there is no conceptual difference between reading a RAM location and reading an A/D Result Register. There is also no conceptual difference between writing a result to RAM and writing a "Start Conversion" Command to an A/D Converter.

In the second case assume that the processor has separate address spaces for memory and peripherals. Then the only difference would be the instructions used to read and write from the separate address spaces.

The last comment is that memory has the property that you can read back what you just wrote. Peripheral registers may, but often do not, have this property. It is quite common to have a command register and a status register occupy the identical address. When you write to the address it is a command, but when you read you get status, not the last command that you wrote.

Is that about as clear as mud?
LOL

 

[dknguyen]

Asd

Kind off. You are saying sometimes peripreals have their own memory and you can copy that periphreal memory to regular memory. And in the other case you are saying that the periphreal memory is the same as the regular memory?

And it makes no difference since each place in memory has a unique address regardless of whether it is regular or periphreal memory. But in one case, you can use the regular commands and in the other case there are a different set of commands when working with periphreal memory.

 

[tinman10011001]

The steps are pretty simple, if a DMA is not being used -- the CPU has to do all the writing/reading itself. With DMA, the CPU or periphreal can initiate the DMA process.

An example would be the Commodore 64. The C64 has a 6510 processor and a memory space of 64K. The RAM, ROM, and periphreals are in the same linear address space of 0000-FFFF. I/O is in the space D000-DFFF with several chips assigned in this area including video, sound, keyboard, etc. An example of I/O without DMA on the 6510 would be LDA $D000 which reads Sprite 0 X position. The reverse, write, would be STA $D000.

 

[Papabravo]

dknguyen,

With those CPU differences in mind, a DMA controller must know which kind of CPU architecture it is working with since it must EXACTLY mimic the address lines, the data lines, and the control signals that the CPU would generate in order for the memory and peripherals to function appropriately. In addition to this requirement for mimickry it must also ASK and be GRANTED permission to control the address bus, the data bus, and the control signals. If the CPU GRANTS this permission to the DMA controller then it must place it's signals in a high-impeadance state and suspend its activities until the DMA controller is finished.