Thanks for the quick reply!
That explains a lot; I was wondering what it meant by frequency divider. What pins would I use to set up the divider IC? I've seen truth tables in the datasheets; they make a bit more sense now but I think I'm still a bit confused. For example,
TI CD4059 datasheet has a complicated truth table describing the divison mode that the IC will go into when its control inputs Ka, Kb and Kc are set to various configurations. It then goes into the process of setting division to any N, by changing the "preset" that is jammed into the counters...
Actually I think after reading the publications a bit more, I think I understand better. Let me try and write the process out, and tell me if this seems reasonable:
The CD4059 has 24 pins. 3 of these pins are Ka, Kb and Kc. Based on the truth table in the datasheet, these pins set the basic count modulus to a selection of basic values D: by 1, 2, 4, 5, 8 or 10. Then, to divide by any N, you first find what N/D is. You encode the whole number part of N/D into a set of preset pins, and then encode the remainder of N/D onto another set of preset pins. Then, you feed a clock signal into the 4059's clock pin, and on the out pin, a signal will come out such that for every N pulses of the input clock, one pulse will come out.
Is this correct? Also, pin 2 of the 4059 is labeled L. What exactly does this pin do? Either way, thanks for giving me that initial *push* towards understanding.
EDIT: i see now, pin 2 is the latch