Had me grinning the whole time I was reading through the data sheet. The most notable points:
8 "cogs" (i.e. cores)
80MHz operation (with a /4 - ~20MHz instruction rate unfortunately)
32 bit instructions
512 x32 words instruction/data memory per cog
8K x32 shared memory per chip
a rom table with a built in character font(complete with some electronic symbols ?!)
Looks like Parallax actually went and built the successor to the SX series of chips.
James
8 "cogs" (i.e. cores)
80MHz operation (with a /4 - ~20MHz instruction rate unfortunately)
32 bit instructions
512 x32 words instruction/data memory per cog
8K x32 shared memory per chip
a rom table with a built in character font(complete with some electronic symbols ?!)
Looks like Parallax actually went and built the successor to the SX series of chips.
James
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