The MC100EP33 ECL circuit has differential inputs with a common-mode voltage of about 3.5V with a 5V supply. You can connect the differential inputs to the outputs directly when going ECL to ECL chip. For single ended input you tie one of the inputs to the VBB voltage (about 3.5V with a 5V supply). The other logic level input should then be driven between 3.1 and 4.0V.
You need an ECL to TTL converter to interface to CMOS logic. It converts the 3.1 to 4.0V ECL signal to the CMOS 0V to 5V levels.
Working at high frequencies requires transmission lines on all but the shortest connections (The maximum is approximately (3.5 * Tr)" for stripline where Tr is the signal risetime in ns. Thus for the 0.32ns risetime of the MC100EP33 the maximum unterminated trace length is 1.1".) PC traces must be laid out as microstrip or stripline to control the impedance. (A program to calculate trace impedances is available at UltraCAD Design, Ind.) The ends of the lines must be terminated in the characteristic impedance of the line with the resistor connected to a voltage equal to VBB. Typical PCB trace impedances are in the 100 ohm range but you need to calculate the value for the particular trace width, dielectric, etc. for the circuit board you are building.
Decoupling the IC is also critical. The circuit must be laid out on a PC board with a ground plane. A small (0.01uF) ceramic surface mount cap must be mounted as close as possible to each chip's power pin with the other end connected directly to ground plane. A good way to make this connection is to flood the top layer of the circuit board with ground plane between all traces and connect the capacitor directly to that. This flooded plane should then be connnect to an inner layer ground plane with numerous vias covering the board.
As is apparent, layout and decoupling are critical for high frequency circuits. Sloppy layout or interconnections will likely lead to the circuit not operating correctly.