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DC/DC true shutdown

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I recently came across a paper by Maxim that explained how a "true shutdown" for DC/DC converters could be achieved: place a MOSFET between the load and the ground.

OK I was wondering why they dont include the ground of the DC/DC as well? Wouldn't that make you get rid of the standby current and the SHUTDOWN pins? I suppose there must be a reason why this is bad design, but I cant come up with one... Anyone?


please post a link to the paper.
The frequencies running around inside the converter are higher than the frequencies at the output of the converter (for a well designed converter anyways). Placing something less ideal (transistors have more resistance, capacitance, and inductance than just a piece of wire) in the ground path of high frequencies = bad idea. At least, that's my take on a possibility as to why.
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Circuit here:

Rest was useless text.

In Spice I don't see a difference, but of course real world may differ. I chose a MOSFET with low Rds.

If you switch off the input capacitor as well, you're gonna get a high inrush current every time because it's probably a low-esr capacitor. So perhaps that might be a reason, what do you think? If you connect the input capacitor to the "real" ground then probably the path via the MOSFET is going to be too long...

True shutdown is a term that means the output of a dc/dc converter is collapsed to ground (0V) when the part is in shutdown. If you have low current circuitry hanging off the output of a dc/dc converter, then put the part in shutdown, the output voltage will remain high until the output cap discharges. With a low current circuit this could be quite some time - in other words, your circuit is still operating when you think it has shut down.

True shutdown disconnects the output from the input and shorts out the output cap.

Now for a lesson in chip design: The input of most chips have a diode from the input to the Vcc pin and one from ground up to the input. Thus if the input is taken higher than the Vcc pin by more than 1 diode drop, the top diode conducts and turns on the chip. This is not good news. This is where your abs max conditions come from in most chip datasheets. Hold this thought for later...

Now for Shutdown: They sometimes build the silicon connected to the drain of a FET. The source of the FET is connected to ground. To bring the chip to life, switch on the FET, pulling the chip ground down to 0V. To put it in shutdown, switch the FET off. Thus the whole circuit floats with no reference to ground.

Back to the fate of our input diodes..... If the chip is floating (in shutdown), and you apply a voltage to the input, you cannot get any conduction path into the input diodes. Alternatively, if you shut down the chip by removing the Vcc voltage, then apply an input voltage, your diodes conduct. This is why they use such a strange way to shut down the chip.

I dont fully understand the question you are asking, but this explains what shutdown is and what true shutdown means..

Bill Naylor - chip designer to the stars
I'm going to have to design a chip at university this year. Don't know if that's a pain or a blessing :)

Let's assume that it is not a problem that the load continuous operating for some time on the output cap.

I don't fully understand your theory about the SHDN vs taking away the ground of the chip. How can the diodes conduct when the chip does not have a ground connected?

What I meant is the following. If you take a look at the circuit of my previous post, you see the GND and other pins of the IC still connected to the "real" ground. What my question was is why don't they connect the GND and input and output cap of the IC also to the drain of the MOSFET?

The reason I'm asking this is because my stepup (ON NCP3063) has high standby current.
OK first the diodes: If you remove the Vcc to the chip and apply a positive voltage to the input, the top diode (inside the chip on the other side of the input pin) will conduct and power the chip. If you remove the ground, you need to apply a negative voltage to the input for the chip to bias into conduction. Negative voltages are less likely to happen, so they float the earth.

Now, why have they not connected the ground of the chip to the drain of the FET. I see your point and partly agree with your concerns. however, if they float the ground to the chip, then the low battery detector output will not work. If the quiescent current consumption of the MAX756 is so low (compared with the current the load will take) the designer of this circuit probably thought it was a safer bet to keep the chip operating as designed and only float the load on the external FET

Stick with chip design - you can do it anywhere in the world (with a PC and internet link), you can work from home and moreoever, it pays very well!
And you get the inrush current of the low esr input capacitor every time you close the switch.... It's not so easy as it seems unfortunately. Anyway thanks I'm going to try to finish this.
Just in case anyone is still following this: another question.

This regulator IC has a SHDN pin. Now if you low-side switch the GROUND away you could do two things:

Keep using SHDN and give it a 1 when you open the switch. The IC stops switching and all is fine.

Tie SHDN to GND and save a transistor and resistor on your pcb . Problem is that the IC keeps switching, but it doesn't have much to swith (couple of uA left in the inductor I assume). Is this bad, could it damage the IC?
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