D flip flop

[datta]

How do you connect the reset and the preset pins of the d flip flop so that ,the initial state of the output is maintained logic0.That is even during the transient response of the supply or in other words when the input is a ramp initially..
Both reset and preset are active low...I connected a power supervisory ic for the reset pin .Power supervisory has active low reset output but i guess connecting the active high reset output of the power supervisory ic to the preset pin of the d flip flop wont solve the problem.
Please help me

 

[Ubergeek63]

A low output would be reset. you supervisor active low output should do the trick, though you could use and RC to hold it low while the power came up as well.

 

[datta]

but the preset input of the d flip flop cannot be left alone right..i have to give a logic 1 for the preset input...but when vcc supply is going to ramp up,supervisory circuit cannot produce a instantaneous logic 1 output to give it to the preset input right..