Multipliers are simply amplifier stages, with a tuned output - so you input (for example) 12MHz, and tune the output to 24MHz (the second harmonic), this gives an output at twice the input frequency. The next stage would be tuned to 48MHz, doubling the frequency again, the final multiplier could be tuned to 144MHz (third harmonic), giving a total of 12 times multiplication.
PLL's work differently, by division, rather than multiplication.
To use the same 12MHz to 144MHz example again, you would have a free running VCO (voltage controlled oscillator) at around 144MHz, and a fixed crystal controlled oscilator at 12MHz. The output of the VCO is applied to a chain of frequency divider chips (digital logic), which divide by 12 times - thus giving an output roughly around 12MHz.
This output is then compared with the crystal output, using a phase comparator - this produces an error voltage dependent on the error between them. This error voltage is used to feed the VCO - correcting it's frequency until the two signals (12MHz crystal and divider output) are identical. This is an ongoing process, and keeps the 144MHz output accurately locked to the 12MHz reference.