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CPLD power supply

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Icc is given on page 3 in the DC Electrical Characteristics Table and depends upon operating frequency.

Iccaux is apparently not given, but it should be much lower than Icc since it's just for the JTAG circuitry.

Iccio is the output current which depends upon the output resistance and capacitance load, and the output data frequency. Capacitive power required for each output pin equals fCV² where f is the output frequency, C is the output load capacitance, and V is the output voltage level.

I would think 100mA total supply current would be more than sufficient for reasonable value of the loads at the outputs.
 
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Each I/O can sink/source 8ma. 10 I/O would be 80ma worst case.
 
I have about 20 I/O but only a few of them will be active on a given time.20*8mA=160mA,then maybe 100mA regulator isn't good enough...,right?
 
I have about 20 I/O but only a few of them will be active on a given time.20*8mA=160mA,then maybe 100mA regulator isn't good enough...,right?
Depends upon your actual load. The 8mA is the maximum external load. Typically if you are driving another CMOS gate, then the load is microamps (expect for the dynamic capacitive load current as I noted in my previous post).
 
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