SneaKSz
Member
Hello all,
I"m having a difficulty with understanding how these comparators and latches work . The schematic below comes from a flyback convertor .
**broken link removed**
The datasheet says :
I understand that the output of the LINE UVLO turns high and F2 is set.
But I dont get why the output buffer shuts down.
Is it because the capacitor on SS will discharge , the SS amp output will be high , V+ of the opamp will get low.Vfb gets low , V- of VFB get low . and Vout of VBF comp gets high. G3 is high and R from F3 is being set?
I'm just confused because they say first " the output buffer shuts down " and then" the capacitor discharges" .
If that would be reversed , I would know that my thinking is allright, but now I"m just confused. Could someone help me out on this one?
Kind regards
I"m having a difficulty with understanding how these comparators and latches work . The schematic below comes from a flyback convertor .
**broken link removed**
The datasheet says :
Thermal Shutdown
If the IC junction temperature exceeds approximately
150°C the thermal shutdown circuit sets F2, which shuts
down the output driver and discharges the Soft−Start
capacitor. If no other faults are present the IC will initiate
Soft−Start when the IC junction temperature has been
reduced by 25°C.
I understand that the output of the LINE UVLO turns high and F2 is set.
But I dont get why the output buffer shuts down.
Is it because the capacitor on SS will discharge , the SS amp output will be high , V+ of the opamp will get low.Vfb gets low , V- of VFB get low . and Vout of VBF comp gets high. G3 is high and R from F3 is being set?
I'm just confused because they say first " the output buffer shuts down " and then" the capacitor discharges" .
If that would be reversed , I would know that my thinking is allright, but now I"m just confused. Could someone help me out on this one?
Kind regards