Comparators and latches

Hello all,

I"m having a difficulty with understanding how these comparators and latches work . The schematic below comes from a flyback convertor .
**broken link removed**

The datasheet says :

Thermal Shutdown
If the IC junction temperature exceeds approximately
150°C the thermal shutdown circuit sets F2, which shuts
down the output driver and discharges the Soft−Start
capacitor. If no other faults are present the IC will initiate
Soft−Start when the IC junction temperature has been
reduced by 25°C.

Click to expand...

I understand that the output of the LINE UVLO turns high and F2 is set.

But I dont get why the output buffer shuts down.

Is it because the capacitor on SS will discharge , the SS amp output will be high , V+ of the opamp will get low.Vfb gets low , V- of VFB get low . and Vout of VBF comp gets high. G3 is high and R from F3 is being set?

I'm just confused because they say first " the output buffer shuts down " and then" the capacitor discharges" .

If that would be reversed , I would know that my thinking is allright, but now I"m just confused. Could someone help me out on this one?

Kind regards

Yes, it should be: "it discharges the Soft-Start capacitor which shuts down the output driver."

Hi crutschow ,

Thanks for the answer , the data sheet also says the following :

Soft−Start is accomplished by clamping the VFB pin 1.32 V
below the SS pin during normal start up and during restart
after a fault condition. When the CS5124 starts, the
Soft−Start capacitor is charged from a 10 µA source from 0
V to 4.9 V. The VFB pin follows the Soft−Start pin offset
by −1.32 V until the supply comes into regulation or until
the Soft−Start error amp is clamped at 2.9 V. During fault
conditions the Soft−Start capacitor is discharged at 10 mA.

Click to expand...

Isnt the inverting input of the SS amp tied to 2.9V+0.6V ( diode)?

Kind regards