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CMOS fanout drive capabilities and Bus Pull-up resistors

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Dialtone

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I hope someone can help answer some questions for me.
I am designing a circuit that will require me to build a parallel bus fan out-in arrangement that will have up to 17 elements on a bi-directional bus. I plan to use pull up resistors to keep the bus logic HI during the time the bus elements are tri-stated.
1. My specific question is as to the value of the bus pull-up resistors to use. I do not want them to overpower the receiver/driver chips ability to sink current to get a valid logic low on the bus leads. Even though the bus will have up to 17 elements attached, it will only have 2 active at any time 1 send and 1 receive). Transceiver chips I am planning to use are either 74ACT245 or 74AC245 with a 5VDC source. Would the resistor value of 4.7K ohms be OK and work on either chip listed above, or should the value be higher?
2. Second question is more general in nature. Can anyone tell me how many elements the 74ACT or 74AC chips are capable of driving? I have heard that generally speaking, CMOS can drive around 50 and TTL around 10. So, is the 74ACT variety consideed a CMOS or TTL chip in this regard?

Some of ths chips I plan to use are 74xx04, 74xx08, 74xx138, 74xx245, and 74xx573 all of which will be either ACT or AC variety due to the processing speed.

Thanks
Dialtone
 
If you are not driving the bus, why care about the state of it? However, since the leakage is low, a high value of resistor can be used, like 100K. Since the ICs are CMOS, DC load is not an issue. The input capacitance of the ACT245 is 4.5pF and the propagation delay is specified at 50 pF load. Therefore, the ACT245 can drive 10 others and meet the specification. It can drive more but will be a little slower.
 
Russlk
If I understand your post, you are telling me that there is no need to add a pull-up to the bus at all? In my earlier proto-trials, I used a 74LS245 chip without a pull-up and the data transfers went well, but when I tried to look at the signals on a scope, the highs were not clearly defined, but looked more like noise. So my thought was to add a pull-up and clean the bus signals up and thereby reduce the possibility of external noise causing loss of data integrity. If it is not needed, it would sure save me some valuable real estate on the PCB layout.

Thanks for explaining where to look in the data sheet for the load information, and how to interpret it.. I want to keep this project as fast as possible, so I will look for an alternative bus chip better suited to a larger fanout.

Dialtone
 
The 74ACxx Cmos doesn't have any input current but you must consider the capacitance of up to 50 inputs and their wiring being driven from a fairly high impedance Cmos output. The max data speed will be very slow.
74ACxx has enough output current to drive a 50 ohm transmission line with an ambient temperature of up to 85 degrees C. Of course if all the output current is being used to drive a pullup or termination resistor then there won't be any current available to quickly charge the capacitance. :lol:
 
OK. I am beginning to understand. The consensus is to drop the pull-up resistors, and I see the logic there.

I do have one other senario that worries me. In this particular instance, I am also using 245 as a uni-directional cut thru device for a register latch enable signal. The 245 outputs will feed 74xx04 hex inverters, the outputs of which must remain logic low unless the input of one of them is driven low at the time of data cut thru. My question concerns what the 74xx04 will see as an input during the 245's high impedence state (tri-state) interval. Do I need a pull-up in this case to ensure the 04 input will interpret the tri state interval as a logic high? Also, is the 04's input affected during the transition time of the 245 from tri-state to output enable? Again, in my earlier trials using LS type chips, everything worked fine without a pull-up, but I am having trouble understanding what (if any) things I need to design differently to use the AC/ACT chips.

Thanks
Dialtone
 
TTL inputs pull themselves high without drive, a Cmos input just floats. The capacitance to ground around it would hold its input at the last driven state.
 
Well that answer certainly confused me, but I think your answer to my question implied that I WILL need a pull up in the case I described to ensure the state of the 04 outputs remains as described until valid data is gated thru the 245.
Dialtone
 
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