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circuit extraction from layout

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mit_mohit

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I am working on a VLSI project where I have to do MAGIC layouts. When we extract the circuit from the layout using the command:-
ext2spice -fspice3 <filename>
In this extracted spice file for some of the PMOS and NMOS area and perimeter is shown 0 though their widhth and length are properly specified. What is the reason for this problem and how it can rectified?
( the technology used for layouts is 0.35micrometer technology)
Also can anyone provide me with optimized layouts for edge triggered D flip flop for the above technology.
 
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