Hi, simulating this circuit:
View attachment 68783
i noticed a different behavior of the timer with or without a capacitor on pin 5.
In particular placing the voltage probe on the gate of the mos and the current probe on the surce of mos, when the power supply goes down, in the case of no capacitor on pin 5, the driving pulse signal gradually decreases limiting the total amount of current absorbed by mos; in the other case (200 nF capacitor on pin 5) the driving pulse breaks suddenly with an effect of peak current conducting by mos
View attachment 68784
could you explain me the reason for this behavior?
View attachment 68783
i noticed a different behavior of the timer with or without a capacitor on pin 5.
In particular placing the voltage probe on the gate of the mos and the current probe on the surce of mos, when the power supply goes down, in the case of no capacitor on pin 5, the driving pulse signal gradually decreases limiting the total amount of current absorbed by mos; in the other case (200 nF capacitor on pin 5) the driving pulse breaks suddenly with an effect of peak current conducting by mos
View attachment 68784
could you explain me the reason for this behavior?
