can anyone help me simplify this?

[miraclezdr]

this is a count limiting circuit, it counts from 0 to 8 then 8 to 1, 1-8. i want it to be simplified so i can wire it up easier.

 

[PhillDubya]

Just use Boolean Algebra.

 

[duffy]

Agreed. Boolean algebra beats K maps any day.

 

[ericgibbs]

this is a count limiting circuit, it counts from 0 to 8 then 8 to 1, 1-8. i want it to be simplified so i can wire it up easier.

hi,
Where is that circuit from.? Is it a college assignment.

Also the 7seg LED, is that just for the simulation.???

 

[miraclezdr]

it is a school project. im asked to design a count limiting circuit based on 74ls193 4bit binary up and down counter.what i have posted is the limiting circuit and the counter.

 

[PhillDubya]

it is a school project. im asked to design a count limiting circuit based on 74ls193 4bit binary up and down counter.what i have posted is the limiting circuit and the counter.

So you designed all of the logic in that circuit?

 

[miraclezdr]

ya. but i think there are some bugs in the circuit.

 

[miraclezdr]

the d flip flop. if both preset and clear is low, the output will be unreliable.

 

[ericgibbs]

it is a school project. im asked to design a count limiting circuit based on 74ls193 4bit binary up and down counter.what i have posted is the limiting circuit and the counter.

hi,
I see, I wondered why the circuit was 'over blown' with gates.

Does your circuit work in simulation.? the 7seg will not display the numeric value of the count.

 

[miraclezdr]

it works. just sometimes the output is unexpected, and have to be reset. i also want to get rid of some gates for more convenience wiring,or maybe another better design.

 

[ericgibbs]

it works. just sometimes the output is unexpected, and have to be reset. i also want to get rid of some gates for more convenience wiring,or maybe another better design.

I would suggest you look at the 'clear' pin for the initial '0' and the 'load' pin for restarting the count at '1'.
You are not using the full capabilites of the LS193.

 

[miraclezdr]

how can do that? im not familiar with 74193, this is my 1st project.

 

[ericgibbs]

how can do that? im not familiar with 74193, this is my 1st project.

hi,
Obviously it would not help you learn if I gave the solution to the problem, but I dont mind giving some guidance.

So, if you havnt already, get the 74LS193 datasheet from; Datasheet Archive - Free Datasheet Search Engine :: PDF Datasheets :: Data Sheet :: Datasheet :: Application Note : ??? : ??? : ???? : ????? : ??????? : Fiche technique : Datenblatt : ????????

Study the functions of the 'clear' and 'load' pins and tell me what you consider they do.

 

[miraclezdr]

thx, i will try to figure it out.

 

[miraclezdr]

hi, i have tried it out. it works perfectly fine on multisim simulation. can u check for me if there is anything i can improve? like adding a filter or something? thx!

 

[ericgibbs]

hi, i have tried it out. it works perfectly fine on multisim simulation. can u check for me if there is anything i can improve? like adding a filter or something? thx!

hj,
Do you mean a power rail filter.?

Do you want to reduce the number of gates even further or are you content with what you have.?

EDIT: how do you ensure a '0' on power up.?

 

[miraclezdr]

ya, a filter connected to clear of D flip flop, that is what i tutor told me.

is it possible to reduce number of gates any further?

 

[ericgibbs]

ya, a filter connected to clear of D flip flop, that is what i tutor told me.

is it possible to reduce number of gates any further?

hi,
I see that gates U9A/U7A and U12A/U17A detect a '0' , then RESET F/F U13A.

Gates U9A/U7A and U3A/U4A detect a '9' and toggle the state of the F/F U13A.

Both of the above actions determine which clock pin on U2 is used ie: up/dn

For the U13A power on CLEAR are you allowed to use diodes??? or must you use another gate.?


BTW: I would have detected the '8' state [D] to Clear the F/F and the '1' state of the LS193 to Set the F/F.
The Clear would have been combined with a power reset from a Res/Cap circuit.

The U16, I would have kept the same,

 

[miraclezdr]

hi,
im allowed to use diodes. what is the use of diodes? how do i connect them?

and why the clear should have been combined with res/cap circuit?

 

[miraclezdr]

hi, the res/cap circuit is something like this?

but for U6A and U5A, why i couldnt replace them with a NAND gate? the output waveform would be neither high nor low if i used NAND insteed.