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Beginner PIC18F2220

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Dragu Stelian

New Member
I have a program to blink an LED, but LED does not blink and I get some messages.

#include <stadio.h>
#include <stdlib.h>
#include <xc.h>
#include "Project1.h"

void main(void)
TRISBbits.RB0 = 0; // Set PortB it 0 as Output
OSCCON = 0x72;
while (1)
LATBbits.LATB0 = ~LATBbits.LATB0;
// Create a 1 second delay loop;
for (int countDelay = 0; countDelay<20; countDelay++)

and hedaer file

// setting the configuration bits
#include <xc.h> // include processor files - each processor file is guarded.

// PIC18F2220 Configuration Bit Settings
// 'C' source line config statements

#pragma config OSC = INTIO2 // Oscillator Selection bits (Internal RC oscillator, port function on RA6 and port function on RA7)

#pragma config FSCM = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)

#pragma config IESO = OFF // Internal/External Switchover bit (Internal/External Switchover mode disabled)


#pragma config PWRT = OFF // Power-up Timer enable bit (PWRT disabled)

#pragma config BOR = OFF // Brown-out Reset enable bit (Brown-out Reset disabled)

#pragma config BORV = 20 // Brown-out Reset Voltage bits (VBOR set to 2.0V)


#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))

#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)


#pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)

#pragma config PBAD = ANA // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)

#pragma config MCLRE = OFF // MCLR Pin Enable bit (MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20))


#pragma config STVR = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)

#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)


#pragma config CP0 = OFF // Code Protection bit (Block 0 (000200-0007FFh) not code-protected)

#pragma config CP1 = OFF // Code Protection bit (Block 1 (000800-000FFFh) not code-protected)


#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0001FFh) is not code-protected)

#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)


#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000200-0007FFh) not write-protected)

#pragma config WRT1 = OFF // Write Protection bit (Block 1 (000800-000FFFh) not write-protected)


#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)

#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0001FFh) is not write-protected)

#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)


#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000200-0007FFh) not protected from table reads executed in other blocks)

#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (000800-000FFFh) not protected from table reads executed in other blocks)


#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0001FFh) is not protected from table reads executed in other blocks)

#define _XTAL_FREQ 8000000

The message:
Clocking 4000000 specified in schematic component is ignored for oscilator mode 'INT-RC.NO CLK0'
The SCSx bits have been set.This feature is not modelled.

Do you have any suggestions ?​

Ian Rogers

User Extraordinaire
Forum Supporter
Most Helpful Member
The message is from Proteus... It's just a standard message when using an internal oscillator... The frequency winwdow is ignored as the settings are on chip.. This message is nothing to worry about..

Can you show me any messages from the compiler... "Stadio.h" isn't correct and the code should not have compiled!!

The ADC spills over to the portb on that chip so you need to turn them off!! Add the line "ADCON1 = 0xF;" and it should work..
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