;******************************************************************
; more DDS musings Mike, K8LH *
;******************************************************************
;
; use an 18F14K22 (64-MHz), a 32 cycle (500-kHz) DDS loop, and
; 25.575 bit accumulator and phase variables for a 0.01-Hz DDS
; frequency resolution (log500000*100/log2). subtract phase
; offset each loop and add 500000*100 on accumulator underflow
; then use upper 9.575 accumulator bits (b25..b16) as an index
; into a 763 byte (2^9.575) sine array.
;
; stuff 'phase' offset variable with frequency*100 values (use
; 75000 for 750.00-Hz, 104005 for 1040.05-Hz, etc). consider
; limiting upper frequency to 16 samples per cycle (500000/16)
; which is 31250.00 Hz. Experiment to determine lower limit.
;
dds64
movf phase+0,W ; subtract phase offset from
subwf accum+0,F ; the phase accumulator
movf phase+1,W ;
subwfb accum+1,F ; accumulator b15..b8
movf phase+2,W ;
subwfb TBLPTRL,F ; accumulator b23..b16
movf phase+3,W ;
subwfb TBLPTRH,F ; accumulator b25..b24
;
; add 500000*100 to accumulator on accumulator underflow
;
movlw 500000*100%0x0000100
btfsc TBLPTRH,7 ; negative? no, skip, else
addwf accum+0,F ;
movlw 500000*100/0x0000100
btfsc TBLPTRH,7 ; negative? no, skip, else
addwfc accum+1,F ;
movlw 500000*100/0x0010000
btfsc TBLPTRH,7 ; negative? no, skip, else
addwfc TBLPTRL,F ;
movlw 500000*100/0x1000000
btfsc TBLPTRH,7 ; negative? no, skip, else
addwfc TBLPTRH,F ;
movf tbladdr,W ; tables 1000, 1400, 1800, 1C00
iorwf TBLPTRH,F ; select proper table
tblrd* ; uses 2 cycles
movff TABLAT,PORTC ; 8-bit sine value
xorwf TBLPTRH,F ; restore accumulator value
nop ;
nop ;
nop ;
bra dds64 ; must be exactly 32 cycles total
;******************************************************************