I have an application where I don't want to use a clamp diode across a small inductor in a FET switch. I think I can let the FET go into avalance mode safely but I would like to see it on the simulation. In the simulation the FET does not seem to go into avalance mode and the voltage just continues to rise when it is turned off. Am I missing somethig or does LTSpice not simulate the breakdown? If it is the latter could I just add a zener to the circuit or a model to simulate it?