ARM7, interrupts

hi,

I have a doubt on interrupts of ARM7 core.
When there are two interrupts simultaneously occuring, then how the interrupts are serviced?

thanks

beenuseren said:

hi,

I have a doubt on interrupts of ARM7 core.
When there are two interrupts simultaneously occuring, then how the interrupts are serviced?

thanks

Click to expand...

You don't say which ARM7, there are several companies making them. I would think that all give you the option of deciding which interrupts have priority.

I'm a bit familiar with some of the Phillips chips. This is from page 13 of the preliminary data sheet for the LPC2138

The VIC accepts all of the interrupt request inputs and categorizes them as FIQ, vectored
IRQ, and non-vectored IRQ as defined by programmable settings. The programmable
assignment scheme means that priorities of interrupts from the various peripherals can be
dynamically assigned and adjusted.

Click to expand...

(VIC = vectored interrupt controller)

There is a lot more info which follows, but you should get familiar with the data sheet for your controller.

In very general terms, even with no assumption about priorities, the decision about which one to service is irrelevant. Whichever one goes first the other one must wait until the first one is complete, then take its turn. In some processors it is possible to allow nested interrupts. This should be avoided until you are really comfortable with the hardware and the system you are trying this on, and have a good reason for wanting to do it.

Under the assumption that interrupt processing time plus interrupt latency time is very much less than the interrupt arrival rate, then processing never falls behind. This is probably the most important reason why interrupt routines should be short and fast. It is almost always a mistake to perform lengthy and non-deterministic amounts of processing in an interrupt routine.

Thanks for the info provided