And -> OR Gate

EngIntoHW · Jan 16, 2012

Hi,
I saw several designs of Addition Circuits using AND -> OR Gates, as in attached picture below.
Does it take less hardware to implement an AND -> OR Gate?

My lecturer said something about having AND -> OR -> INV Gate rather easy for implementation, but did not follow him.

crutschow · Jan 17, 2012

Certainly if the AND>OR gate is in one package it would take fewer chips to implement the function then a separate AND and OR gate. It likely also takes less total internal circuitry and would have less propagation delay then two separate chips.

Mikebits · Jan 17, 2012

Could do it all with NAND gates

Ian Rogers · Jan 17, 2012

Mikebits said:
Could do it all with NAND gates

That's how we were told to do it back in my college years..

EngIntoHW · Jan 17, 2012

Hi mates.
Thanks a lot!

I tried implementing AND-OR Gate with only NANDs, but didn't reach anywhere with that.
Is it indeed possible to do it efficiently?

audioguru · Jan 17, 2012

There is a thread on one of these forums where a circuit used three or four 4093 Schmitt-trigger NAND gates because there is no Cmos Schmitt-trigger OR gate available.

EngIntoHW · Jan 18, 2012

Thanks.

Mikebits said:
Could do it all with NAND gates

Mike, do you have a schematic of implementing AND-OR with NANDs?

ronsimpson · Jan 18, 2012

In post 1,
If A=1 then D=1 and B,C are don't care.
If B=1 & C=1 then D=1 (A=don't care)
All other states D=0
There are many different ways to get this. Example D=B&C is like /D=/B or /C (/D= inverse of D not D)

Three nand gate will work.

Roff · Jan 18, 2012

Here is one way to do AND-OR-INVERT inside a chip. AND-OR requires two more transistors.

EngIntoHW · Jan 19, 2012

Thanks a lot!

Roff said:
Here is one way to do AND-OR-INVERT inside a chip. AND-OR requires two more transistors.

As I understand, AND-OR-INV is not implemented by NAND or NOR gates, but the way you showed here?

Roff · Jan 19, 2012

EngIntoHW said:
Thanks a lot!

As I understand, AND-OR-INV is not implemented by NAND or NOR gates, but the way you showed here?

It depends on where it is implemented. The schematic I drew might be found inside a CMOS LSI or MSI chip. I don't know of any 3-input AOI SSI chips. If you Google AND-OR-INVERT, you will find some multi-input TTL chips, but I think they all have more than 3 inputs.

EngIntoHW · Jan 21, 2012

Thank you very much Ron!

And -> OR Gate

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