Adjustable High Gain/Wideband Feedback Amplifier

[EEngineer]

Please find attached the assignment sheet:

Project 4: Adjustable High Gain / Wideband Feedback Amplifier

1. Introduction.
The aim of this project is to design a versatile amplifier that works in two possible modes: open loop and closed loop modes with different gain and bandwidth requirements.

2. Design
Note that the specifications given below are very similar to a two-stage OPAMP circuitry. While you can definitely benefit from techniques to design two-stage OPAMPs, you don’t need to design any OPAMP. Your design can be both differential or single-ended (i.e. cascading stages of single stage amplifiers).
In this project, YOU MAY NOT USE OPAMPS or any other components except, discrete transistors, resistors, capacitors and inductors. A basic block diagram of the amplifier is given in figure 1, and the required specs for both open loop and closed loop mode are given as below:



a. Open Loop Mode: High Gain, low bandwidth mode.
- Gain >= 60 dB*
- Bandwidth: DC ‐ 500 Hz
- Supply Voltages: VDD and VSS (these can be anything ranging from 15V to ‐15V)
- Power Consumption < 100 mW
- For no input excitation, your circuit should have an output between VDD/2 to VSS/2.
- Phase Margin > 45°
- Input Resistance > 100KΩ
- Output Resistance: 50 Ω

2. Closed Loop Mode: Low Gain, high bandwidth mode.
- Gain >= 20 dB*
- Bandwidth: DC – 100KHz
- Supply Voltages: VDD and VSS (these can be anything ranging from 15V to ‐15V)
- Power Consumption < 100 mW
- For no input excitation, your circuit should have an output between VDD/4 to VSS/4.
- Input Resistance > 100KΩ
- Output Resistance: 50 Ω

*dB (decibel) in magnitude (A) is defined as,



You will switch from open loop to closed loop mode by using a feedback method of your choice (series-series, series-shunt, etc).

3. For Multisim simulation:
- You are required to test your circuit in both open and closed loop modes.
- Your test should be able to resolve the high gain of the open loop mode, phase margin in open loop mode, and input and output resistances accordingly.



I need some pointers regarding the following points:

1. How can I find the DC bandwidth so as to satisfy the requirement of 500Hz DC?
2. As I know, the feedback has to usually be from the output to the input. So what and how should we connect in the feedback to get a 100kHz (closed-loop mode)

 

[EEngineer]

Update: Just found out the Noise Analysis Tool in MultiSim, trying to figure it out

 

[crutschow]

1. DC bandwith is zero. You need a bandwidth from DC to 500 Hz for Amp a. You can measure the bandwidth in Multisim.

2. The instructions say you can use "a feedback method of your choice (series-series, series-shunt, etc)," which would imply you have studied these various feedback methods. Have you?

Why are you looking at the noise analysis tool in Multisim? Your amp has no noise requirements.

 

[MRCecil]

1. How can I find the DC bandwidth so as to satisfy the requirement of 500Hz DC?
2. As I know, the feedback has to usually be from the output to the input. So what and how should we connect in the feedback to get a 100kHz (closed-loop mode)

1. The point of interest is the corner frequency of 500Hz as tasked...the -3db point at 500Hz with an open loop gain of 60db or Av=1000 within the bandwidth. So an input of 10mV signal at 100Hz should give you an output of 10V. However, with an input at the same level of 10mV at 500Hz, the output should be down 3db or at 7.07V.

2. You got it already. From output back to the input, just like an op amp to the inverting input. The required gain of 20db or Av=10 with the given bandwith at 100KHz gives a ratio of 10 for the feedback network. So Rf=1M and Rs=100K.

Now all you have to do is build that op amp out of discretes. Good luck.

 

[EEngineer]

1. The point of interest is the corner frequency of 500Hz as tasked...the -3db point at 500Hz with an open loop gain of 60db or Av=1000 within the bandwidth. So an input of 10mV signal at 100Hz should give you an output of 10V. However, with an input at the same level of 10mV at 500Hz, the output should be down 3db or at 7.07V.

2. You got it already. From output back to the input, just like an op amp to the inverting input. The required gain of 20db or Av=10 with the given bandwith at 100KHz gives a ratio of 10 for the feedback network. So Rf=1M and Rs=100K.

Now all you have to do is build that op amp out of discretes. Good luck.

1. For the 60 db, Av= 1000, the circuit is shown in picture 2 ( attached ) and the AC analysis is attached in picture 4
2. For the feedback, Av= 10, and the circuit is shown in picture 3, and the AC analysis is attached in picture 5..
I didn't use the values you told me about but we have added at the output a resistor with a capacitor to change the gain to 1000, is that right?

Will that satisfy the frequency requirement of 500Hz?

 

[EEngineer]

bump! still waiting

 

[MRCecil]

Formulating a response ATT. Be patient with me.

 

[EEngineer]

Thanks alot

 

[MRCecil]

Where to begin...

Having read your prof's assignment carefully, it was clear to me that he was asking your class (level 300?) to build/design an op amp from discretes, which I hinted at in my first post. After looking at your sim results, it appears that you have not understood the assignment or the definitions of the parameters involved.

Don't be disheartened, or discouraged as this is common for students at this stage. I'll try to steer you in the right direction, but will not give you the complete solution; that, I perceive is not the function of this forum. And be patient, as I do need some time for my beer and chat in my dotage.

1. Look up the terms response curve, bandwidth, corner frequency, junction capacitance, roll-off and the differences between optimized virtual xistors and real world xistors, et al.

2. Now look at your response curves. Does it display any roll-off at either 500Hz or 100KHz? I see the bandwidth far, far beyond the specified limits.

3. With the assumption your prof was asking you to design an equivalent of the uA741 op amp with discrete components sans differential compensation with an optimized matched differential pair, do you not think it necessary to look at the limiting parameters of that device? HINT! I could be wrong, but...

4. Now look at your sim recorded values. What is Av in the one on the far right? I calculate ~1000 per the scaling. I also see that the frequency at that point is 500Hz. That is the corner and should be at –3db or at .707 of the in band voltage.

You have more work to do.

 

[EEngineer]

updates

I did some reading in the Hambley book in chapter 9, and i found a section that relates to this project. specifically section 9.10 in which they refer to an LM733 amplifier which suits my needs.

My attached circuit satisfies the closed-loop mode requirements (appart from the power consumption which i dont know how to calculate?)

but the problem is when i remove the feedback for the open-loop, my ac analysis in multisim shows me absolutely nothing!

 

[EEngineer]

Where to begin...

Having read your prof's assignment carefully, it was clear to me that he was asking your class (level 300?) to build/design an op amp from discretes, which I hinted at in my first post. After looking at your sim results, it appears that you have not understood the assignment or the definitions of the parameters involved.

Don't be disheartened, or discouraged as this is common for students at this stage. I'll try to steer you in the right direction, but will not give you the complete solution; that, I perceive is not the function of this forum. And be patient, as I do need some time for my beer and chat in my dotage.

1. Look up the terms response curve, bandwidth, corner frequency, junction capacitance, roll-off and the differences between optimized virtual xistors and real world xistors, et al.

2. Now look at your response curves. Does it display any roll-off at either 500Hz or 100KHz? I see the bandwidth far, far beyond the specified limits.

3. With the assumption your prof was asking you to design an equivalent of the uA741 op amp with discrete components sans differential compensation with an optimized matched differential pair, do you not think it necessary to look at the limiting parameters of that device? HINT! I could be wrong, but...

4. Now look at your sim recorded values. What is Av in the one on the far right? I calculate ~1000 per the scaling. I also see that the frequency at that point is 500Hz. That is the corner and should be at –3db or at .707 of the in band voltage.

You have more work to do.

does that mean i can build this: File:OpAmpTransistorLevel Colored Labeled.svg - Wikipedia, the free encyclopedia

 

[MRCecil]

My attached circuit satisfies the closed-loop mode requirements...

Does it? Let's review that part of your assignment for satisfaction of that portion.
· Gain: >= 20db (with the equation provided)
· Bandwidth: DC-100khz
· Power in: < 100mw
· Output offset: <= 25% of Vdd+Vss
· Input resistance: > 100K ohms
· Output resistance: 50 ohms

First, your schematic does not show the input R, the output R, the feedback circuit or the various nodes of interest. How is your instructor or anyone else going to be able to evaluate the circuit or the sim results without that information.

Now look at your Multisim results. How can one determine the gain if only the output is displayed? Does that max gain shown of approx. -53db seem accurate to you? Your input signal would be swept at –73db or less to meet that criteria, which seems an extremely LOW input (in the microvolts). With Av >= 10-50(?), I recommend an input of at least 100mv, which would easily keep the output between the 5V rails shown, given Multisim uses P-P values rather than RMS, for Av at 50. I'm not familiar with that sim, but you should be able to place the input there, too, to make it apparent what the gain truly is. And get the scaling, both X and Y, in proportion to make it easier to determine the actual values (Y) vs. frequency (X).

Still looking at the sim results, it appears that the bandwidth requirements are not met. At 100khz there is no roll-off. The actual bandwidth shown is DC- ~400khz. The latter is the approximate –3db point, which is required to be 100khz.

Now look at both the phase and gain results. Note the rapid shift in phase at ~3Mhz and the corresponding rise in the gain. That is instability, and just needed a little more phase shift to turn your circuit into an oscillator beyond about 4Mhz. That is because you have not incorporated any phase compensation by either direct means or via Miller effect (junct. capacitance, which is beyond your capabilities at this point in your education, methinks). Now LOOK at the 30pf cap in the uA741. I didn't mean for you to try and copy another design, but to look at what was done for offset and phase compensation, both to be considered per the assignment. That is how the 741 revolutionized op amps in 1968. That is what you need to consider in YOUR design rather than trying to emulate another's.

You really need to conquer the open loop portion of the assignment first. Then worry about the closed loop requirements, which will take care of themselves with some thought given to the requirements of the assignment.

...but the problem is when i remove the feedback for the open-loop, my ac analysis in multisim shows me absolutely nothing!

Is the Y scaling correct that you have placed in the sim? Again, I'm not familiar with Multisim. Is it off scale?

...(appart from the power consumption which i dont know how to calculate?)

Ohm's Law should give you the answer. Power = Current (total) X Voltage (total). Not really that hard to fathom is it?

I may have left something out in this critique, but I will leave you with this. If you want to be an engineer, you must pay full attention to detail and instructions.

 

[EEngineer]

You really need to conquer the open loop portion of the assignment first. Then worry about the closed loop requirements, which will take care of themselves with some thought given to the requirements of the assignment.

Okay, thanks. I guess I was in the right track this time, since I got my bandwidth around 505 Hz for open loop mode; the gain is 70 dB.
Then I have added a resistor as a feed back... so the gain has decreased but still more than 20 dB and the bandwidth has increased to almost a 101 kHz.
I just need you to check my circuit. If everything is right... my last step is to find the input/output resistances and see if they meet the criteria.. ∫∫∫∞

 

[MRCecil]

I don't know about those gain and phase plots. They correlate very closely to what one could expect on the input of a bipolar amp given varying drives for both conditions rather than the output. The phase plot is a dead give away for something not being normal, and then the gain plot just isn't right. The gain down 30 some db @ 1Ghz? Does that seem right to you?

But you have not provided enough data to make a full evaluation; one of those niggling details I referred to earlier. At a minimum, the input level of the sweep as well as the output should be overlaid on the same plot to display the actual gain. If you could post your schematic including the feedback and the phase/frequency compensation components marked as such, I would have a better idea what is occurring with your design.