Hi again, thanks for getting back to me.
I've done a fair bit of reading on the ground plane subject. The article below asserts that actually splitting the plane isn't necessary, as ground currents tend to flow directly underneath their traces, (provided the path is uninterrupted). There's an interesting table about the percentage of ground current a given distance away from the trace - 87% is contained within 5 trace widths!
Presumably, then, splitting the board is only worthwhile if you actually need to redirect the return path to avoid a nearby trace?
https://www.electro-tech-online.com/custompdfs/2010/04/june2001pcd_mixedsignal.pdf
Regardless, this doesn't seem to apply to my board. I've got separate and distant analogue/digital traces, and followed the ADC manufacturer's recommended trace layout for the chip itself. Also, the power supplies are separate and chosen specifically to be low noise. The voltage references are from precision sources, and buffered through a low noise op-amp. I feel like I've done all I could!
Additionally, there should be very little high frequency noise anyway - the uC I'm using is the only source, and is doing very little, far away. I've tried setting it in low power mode - which shuts off clocks and peripherals - to take measurements, so I'm pretty confident it isn't the source of the noise.
Short of getting hold of an oscilloscope to identify the source, can you suggest anything else?
Thanks,
Dan.
Edit: Sorry, I realise I haven't answered your question about supersampling - and no, it's not possible really as I need to capture a lot of samples quickly.