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Active Filter Design

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Your load resistance is only 6 ohms so it is almost a dead short. It will have a peaked voltage at the resonant frequency only if the source has an extremely low output impedance (0.06 ohms or less) and if the resistance of the coil is extremely low.

But the output impedance of most signal generators is 50 ohms and a coil might have a resistance that is much higher than the dead short of your load.
 
Ok, so should I just increase the value of the load resistance in my original LC circuit in order to decrease the gain?
 
Ok, so should I just increase the value of the load resistance in my original LC circuit in order to decrease the gain?
Your series LC circuit is almost a dead short at its resonant frequency. No signal source has a low enough impedance to drive it.
You understand electronics backwards. When you reduce the load on the signal then it might increase, not decrease.
 
Your series LC circuit is almost a dead short at its resonant frequency. No signal source has a low enough impedance to drive it.
You understand electronics backwards. When you reduce the load on the signal then it might increase, not decrease.

Sorry about being so confused about this.... But when you say "when you reduce the load on the signal then it might increase, not decrease" doesn't it mean that reducing the value of the load resistance might increase the signal (thus, having a gain > 1)?
 
When you short circuit the signal with a low value resistance then its voltage decreases.
Reducing the load is increasing the load resistance.
 
When you short circuit the signal with a low value resistance then its voltage decreases.
Reducing the load is increasing the load resistance.

Thanks again for all the patience you have when explaining me these things. I really appreciate it.
If we decide to reduce the load (by increasing the load resistance) so that it's lower than the
signal's impedance, won't it cause distortions to the output signal?
 
A reduced load resistance is infinity. No load resistance. Higher than 10M ohms. Your load resistance is one million times less.
Your extremely simple circuit does not have an amplifier to produce distortion when it is overloaded but your extremely low load resistance will probably overload your signal source.
 
The OP showed the graph of a peaked voltage so obviously it is from a parallel tuned LC circuit. A series tuned LC circuit produces a voltage null (not a peak) at resonance.

If the parallel tuned LC circuit is loaded down by a fairly low resistance load then it does not produce a voltage peak because at resonance it is a high impedance.

Obviously, from a plot alone one cannot discern the topology employed as demonstrated by the OP's follow on post with the attachment. That applies to your #31 as well. That is why specific references are needed for clarification as I noted above in my previous post.
 
Here's the smaller circuit. So that's what you meant by having a small resistance?

Hello boozi,

I have tracked this thread from the beginning, and I'm familiar with your questions and issues. As a student at University, you will understand that one function of this forum is the mentoring of our replacements in our chosen field of endeavor. As such we have a duty to guide you and your fellows as much as we are capable. Having said that...

Your post, to which I am now responding, has resolved your challenge to the small bite necessary to give you, to what I perceive, some insight to the overall issues of a larger picture.

I will let my attachments do most of the talking. But you must understand first that I/O impedances will have an impact on what you are attempting to accomplish. In your attachment you have finally included a load impedance. For completion of the circuit one must also include the source impedance else real world results will not yield the expected/anticipated results. Look up the term "insertion loss" for further clarification; a passive circuit will never have a gain in the physical world.

Below I have included two thumbs for you to ponder. The first is your circuit stepped with the source and output impedance from 6.25Ω to 50Ω ({R} in the schematic). Note the change in the Q of the circuit I/O as it is stepped.

The second thumb is the response with different values of L and C with the I/O Z stepped in the same manner. The key is the RATIO of the I/O Z and the LC Z. These must be considered when a design is brought into the real world. Pay close attention to the differences in the phase traces in both and comparatively between the two.

When going into higher order filters, you will understand that the complexity increases exponentially, which you will learn as you progress in you studies.

Cheers,
Merv
 

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  • 80 Meg Stepped IOZ 2.jpg
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