a circuit needs to be checked

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I understand with this connection and values the reset issue will going to be solved ?
 

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cannibal said:
I understand with this connection and values the reset issue will going to be solved ?
You have a capacitor with hardly any capacitance and a resistor that sinks hardly any current.
The very old power-hungry TTL counter IC's reset pins needs something to sink 0.8mA at 0.4V which is a 500 ohms (or less) resistor (not 100k) or the collector of a transistor. A 4000uF capacitor will charge into 470 ohms and will produce a reset time of 1 second when the power is turned on. Use 400uf for a 0.1 second reset time. Use 40uF for a 0.01 second reset time. I don't know how quickly your power supply's 5V will rise so 1 second is to be safe.
 
WTF?

Alright I probably was confusing it with CMOS, but even so, it's LS which doens't use as much power as TTL, I can't remember what the input current is but it's not that high.

I wouldn't use a capacitor any larger than 1:mu:F and a resistor no lower than 1k.

The reset time can be very short, <1:mu:s, so I don't know where you're getting 0.01s from. I routinely use a 10k resistor and 1nF capacitor on a 555 timer when I want it to trigger on power on or when the trigger pulse lasts for longer than the cycle and I would use the same values here.
 
I use a 1M resistor and a 0.33uF capacitor for power-up reset on Cmos.

I posted the max current rating of 0.4mA for each of the two reset pins of the 74LS90 earlier in this thread. Here it is again:
 

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audioguru said:
I use a 1M resistor and a 0.33uF capacitor for power-up reset on Cmos.
I used 100pf and 1M on my college project?

I posted the max current rating of 0.4mA for each of the two reset pins of the 74LS90 earlier in this thread. Here it is again:
I admit I was wrong about that.

I'd use 1k and 100nF.

I don't understand why you use such long reset pulses, 100:mu:s is more than long enough.
 
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