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74HC165 8 bit piso shift register

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uceesdp

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Hi all,

I want to input digits from 0-5 parallel and output them serially 0-5 at the same time.

How would I go about this?

thanks
 
Have you looked at the data sheet for the 75HC165? What don't you understand?
 
I've looked at it and dont understand that much. I want to input data without the need for a constant clock pulsing evenly.

I have a counter connected to it and whenever the counter counts up to 5, i want the number 5 to be sent serially through the PISO
 
I've looked at it and dont understand that much. I want to input data without the need for a constant clock pulsing evenly.

I have a counter connected to it and whenever the counter counts up to 5, i want the number 5 to be sent serially through the PISO

A serial shift register requires a clocking pulse, to clock the data in or out bit by bit.

Do you have a diagram.?
 
Hi,

This is my diagram attached.

I got the counter to count up to 5 only and then it resets.
I only want PISO to transmit serially 5, not <5.



thanks
 

Attachments

  • shift register.pdf
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Hi,

This is my diagram attached.

I got the counter to count up to 5 only and then it resets.
I only want PISO to transmit serially 5, not <5.



thanks
hi,
If I am reading your circuit correctly, you dont appear to be using the LOAD pin and the SERout is connected to 0V.??
You are not showing the clock circuit.?
On the '5' count you need a LOAD pulse to the S/R, then 8 clock pulses to shift out the '5' [bits] on the SERout pin.

EDIT:
I see on the datasheet that DS is Serial Data input and Q7 is the Serial Data output, so your 0V to DS is correct, its just the PLOAD thats required and the 8 clock shift pulses.

Is the value always '5' thats loaded to the S/R.?
 
Last edited:
Hi,

The Serial out is connected to a SIPO shift registers. I was told that the load pin should be HIGH to enable the count operation.

The clock to the shift reg should be a clock voltage, pulsing at 100khz

The counter is not clock, it counts at different times.
 
Hi,

Would it be possible to show me a circuit diagram on how to connect the pins. Also whu would i need 8 clock pulses to shift out 5?

thanks
 
Hi,

The Serial out is connected to a SIPO shift registers. I was told that the load pin should be HIGH to enable the count operation.
It has to High for shifting but pulsed Low for Loading the '5'

The clock to the shift reg should be a clock voltage, pulsing at 100khz
You need to allow 8 clock pulses after the LOAD has pulsed Low, then stop them to the S/R

The counter is not clock, it counts at different times.

When I say clock, I mean a shift register clocking [ shifting] pulse.

Is the count always '5'.?
 

Attachments

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    AAesp01.gif
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hi,

the count is always 5.

attached is my project proposal for this part.

NAND2 does not seems to work now.
 

Attachments

  • transmitting the number 5.pdf
    119.4 KB · Views: 415
the counter will always count upto 5 than resets

ok,
As the count is always '5' why not hardwire the '5' bits on the parallel input and use gates to detect the 5th count of the 193 and use that as a PLOAD pulse.
You still need the 8 clock pulses to clock out the S/R.
 
hi,
you mean like this

Yes, but dont forget to connect the other 4 input pins to 0V, because when disconnected on a 165 the will assume a high.
By inverting the PLOAD from the NAND gate, using another NAND or INVERT you could auto RESET the counter
 
hi,

it works but only on the 6th count. i connected the nand gate to the pins 3 and 6 i.e. 1010 = 5. not sure what the problem is.
 
hi,

it works but only on the 6th count. i connected the nand gate to the pins 3 and 6 i.e. 1010 = 5. not sure what the problem is.

Do you mean the PLOAD or the 193 RESET.???
At the 5th count PLoad will go low and load the '5', to enable the 165 to shift the PL must go high, thats why I suggested the auto Reset of the 193.
By clearing the 193 count, the PL will go high, enabling the shifting.

You may find that you will have to add a short delay in the RESET by adding a res/cap in the RESET line.
Do you follow.?

EDIT:
look a this option
 

Attachments

  • AAesp03.gif
    AAesp03.gif
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hi,

Could I connect the counter output pins directly to the PISO input pins with hardwiring the pins to 5?

thank
 
hi,

Could I connect the counter output pins directly to the PISO input pins with hardwiring the pins to 5?

thank

You should be able to put the 165 parallel input wires directly to the 193 outputs, is that you mean.???
Keep the top four 165 pins connected to 0v.
 
When you have that part working, you need a LATCH, you can use two NAND gates.
The LATCH would be set when the 165 is loaded with the NAND gate '5' detect circuit.

With latch set, gate clock pulses into the 165, to shift out all 8 bits, when the last bit is detected reset the latch.
You will need a 8 count detector circuit.
OK

EDIT:
this is an option.
 

Attachments

  • AAesp03.gif
    AAesp03.gif
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Last edited:
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