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7 segment display with limited gates

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der_sed

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Is it possible to build a BCD segment display from 13 NOR gates only.

How do I start? Should I use a K-map to see if the simplification exists.
 
write your truth table with 4 variables (inputs) against the required outputs for individual LEDs,
write down the equation for each outputs as SUM of Producs or Poduct of SUMs which is simpler.
the use any method to simplify the logics of each outputs.
draw the logic
change all gates only to be NOR redrawing the schematic.
further combine logics and minimize as much as possible.


hope you can manage within 13 NOR gates.
 
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Anyone managed to solve this yet? I've been trying to solve it, but the closest I've got is with 14 NOR gates, if you can wire the outputs together to make an OR gate.

Let's say the partial decoder truth table is:
ABCD 0123456
0 0000 1110111
1 0001 0010010
2 0010 1011101
...
9 1001 1111011

Trouble is I'm using (wasting?) 4 as inverters, then 10 4-input NORs to decode the 10 A-D possibilities 0000-1001:

$0=!( a+ b+ c+ d)
$1=!( a+ b+ c+!d)
$2=!( a+ b+!c+ d)
...
$9=!(!a+ b+ c+!d)

then the output OR "gates" would be:

output0=$0+$2+...+$9
output1=$0+...+$9
output2=$0+$1+$2+...+$9
etc.

so output0 would drive segment 0 etc.

I can get !(A+!B), !(A+B) and !(!A+B) from 3 gates, but haven't worked out how to incorporate that into a design...
NOR1: input A,B
NOR2: input A,NOR1
NOR3: input B,NOR1

and adding NOR4: input NOR2,NOR3 gives A NXOR B (i.e. A.B+!A.!B), but that doesn't seem a lot of use, although it could be used for C/D.

Never been able to turn my brain inside out in order to be able to hack NOR logic. Seems it is possible and that there's a better way, but I can't quite reach it.
 
If you use negative logic a NOR becomes a NAND (e.g. if all inputs of a NOR gate are low, then the output is high). Perhaps using that approach would reduce the number of required gates.
 
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can you draw the schematic you have with 14 ICs and post it? there are ways to further reduce it by looking at the schematic.
 
oops, no you can't wire the outputs together to make an OR gate. I'll try the negative logic NAND approach...
 
oops, no you can't wire the outputs together to make an OR gate. I'll try the negative logic NAND approach...

you mentioned you could manage with 14 NOR gates, thats why i asked you. any logic can be implimented only using NOR gates or NAND gates. wheather you go for Product of sum, or sum of products, you have to simplify it1st. then that simplified equation must be implimented using NOR gates only.

i feel you missing some point.
 
Yes, I understand the principle. I know any circuit can be implemented with just NAND or NOR. The problem is figuring it out. The approach of tying the outputs together in lieu of an OR gate doesn't work: if you tie gate1+gate2 together for one output, and gate2+gate3 together for another output, then what you have is the three gates tied together and both outputs identical and wrong. Maybe this is fixable with diodes but the problem stated just 13 NOR gates.

The wording of the question is interesting though. It asks if it is possible. So my thinking is maybe the answer is in fact NO, but I wouldn't have a clue how to go about proving it.

Without any gate restrictions here's how I would do it (ASCII art, so use your imagination):
Code:
LED layout:
 0
1 2
 3
4 5
 6

Truth table:

  ABCD 0123456
0 0000 1110111
1 0001 0010010
2 0010 1011101
3 0011 1011011
			  
4 0100 0111010
5 0101 1101011
6 0110 1101111
7 0111 1010010
			  
8 1000 1111111
9 1001 1111011

Equations:

0= !A.!B. C    + !A.!B.   !D + !A.B.C     + !A.B.   D + A
1= !A.!B.!C.!D + !A. B.!C    + !A.B.   !D             + A
2= !A.!B       + !A. B. C. D + !A.B.!C.!D             + A
3= !A.!B. C    + !A. B.!C    + !A.B.   !D             + A
4= !A.!B.   !D + !A. B. C.!D +  A.     !D             
5= !A.!B.!C    + !A.!B. D    + !A.B                   + A
6= !A.!B. C    + !A.!B.!D    + !A.B.!C. D + !A.B.C.!D + A

Circuit:
  _   _   _   _
A A B B C C D D
| | | | | | | |
| o | o o | | |-D\
| o | o | | | o-D \
| o o | o | | |-D  OR-->0
| o o | | | o |-D /
o | | | | | | |-D/
| | | | | | | |
| o | o | o | o-D\
| o o | | o | |-D \OR-->1
| o o | | | o |-D /
o | | | | | | |-D/
| | | | | | | |
| o | o | | | |-D\
| o o | o | o |-D \OR-->2
| o o | o | o |-D /
o | | | | | | |-D/
| | | | | | | |
| o | o o | | |-D\
| o o | | o | |-D \OR-->3
| o o | | | | o-D /
o | | | | | | |-D/
| | | | | | | |
| o | o | | | o-D\
| o o | o | | o-D OR-->4
o | | | | | | o-D/
| | | | | | | |
| o | o | o | |-D\
| o | o | | o |-D \OR-->5
| o o | | | | |-D /
o | | | | | | |-D/
| | | | | | | |
| o | o o | | |-D\
| o | o | | | o-D \
| o o | | o o |-D  OR-->6
| o o | o | | o-D /
o | | | | | | |-D/
| | | | | | | |
So that's 4 inverters (to get !A from A etc), 29 AND gates and 7 OR gates (40 gates total). There are some duplicate functions here and the gate count can be reduced by not duplicating those lines, but not enough to get it sufficiently below 13 gates so that a simple NOR conversion will result in 13 gates.

If it is possible, then it's going to be by some deviously well thought out combination of gates. I've wondered if this can be used in the design:
Code:
A--+--------
   |        NOR---> !(A+!B)
   +-     +-
     NOR--+-------> !(A+B)
   +-     +-
   |        NOR---> !(!A+B)
B--+--------
which is three quarters of the 4-NOR NXOR implementation, but so far haven't seen how to combine those outputs in any meaningful way. Probably there is some fancy combination like this but with more gates; I've tried a couple of ideas but haven't got close; I've also considered brute-forcing it but keep hitting numbers of the order 10^45 so that's not practical.

I've spent waaaaaaay too much time on this already. OP: just say NO and risk taking the hit, but call them on it and make them show how it's done.
 
did u try to write sum of product? make it simple as possible by any mehtod? let me c if i can for any of the out and tell you.
 
Yes, got it down to 18 gates using PoS:
Code:
0=(   !B+ C+ D) . ( A+ B+ C+!D)
1=(      !C+!D) . ( A+ B+ C+!D)
2=(   !B+ C+!D) . (   !B+!C+ D)
3=( A+ B+ C   ) . (   !B+!C+!D)
4=(         !D) . (   !B+ C+ D)
5=(    B+!C+ D)
6=( A+ B+ C+!D) . (   !B+ C+ D) . (   !B+!C+!D)
(3 inverters for !B, !C, !D, 8 "intermediate" gates and 7 output gates)
 
thats good, but i think you missed to include dont care terms, that will further ghelp to reduce. ie: starting from 1010, 1011...etc. this terms can be added to take adwantage and further reduction is possible, can you have a try?

ie: when 1010 appears we dont bother any output comes to any segment, coz in real it is not allowed to appear.
 
Included don't care terms, that's why quite a lot of them are not dependent on A. Output 0 for example:
(!B+C+D) . (A+B+C+!D) = 1011 0111 11xx xxxx (x=11 0111)
How about you have a try, rather than assuming I don't have a clue and keep missing bits?
By the way, I'm not the OP; this is a puzzle I got interested in.
 
Found a solution with 10 gates for anyone who still cares about this ;-)
Redefine the inputs A-D so that A-C address individual LEDs and D is dropped.
Then just select the relevant LED from the inputs and leave it to whoever provides ABCD to loop over the relevant bits for the number they want.

abc 0123456
000 1000000
001 0100000
010 0010000
011 0001000
100 0000100
101 0000010
110 0000001

seg0=!( a+ b+ c)
seg1=!( a+ b+!c)
seg2=!( a+!b+ c)
seg3=!( a+!b+!c)
seg4=!(!a+ b+ c)
seg5=!(!a+ b+!c)
seg6=!(!a+!b+ c)

- that's 10 gates: 3 inverters and 7 output gates.

To display 0, input loops over 012456
1: 25
2: 02346
3: 02356
4: 1325
5: 01356
6: 013564
7: 025
8: 0123456
9: 012356

I'd still like to know if the answer to the OP's question is YES, or if it's NO, how one would go about proving it.
 
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