555 with normally closed switch

[haxxx]

Hey guys,
Any ideas how this circuit or another 555 circuit could be modified
so it still times out if the switch is accidentally held open.
It will be used with a pair of photobeams that have normally closed contacts
acting as the trigger.
I was trying to avoid using a relay to make it normally open.
(Please speak in as simple a language as u can).
Thanks,
Haxxx

 

[colin55]

The attached circuit will time-out if the switch is kept open. Just make sure the timing components made up of the 10k, 1u and 100k create a shorter delay than the timing components on pin 6, otherwise the timing will be controlled by the 10k, 1u and 100k.

 

[haxxx]

Thanks Colin could u please explain the actual operation,
I been staring at it for a while now not sure what the actual sequence of events is.

Thanks
Haxxx

 

[colin55]

I don't know what you actually want described.

Here is the circuit rearranged so that the function of the pins are obvious. A circuit diagram does not follow the pin-out of the chip, (that's the function of a wiring diagram). A circuit diagram conforms to the functions of the chip.

**broken link removed**

In the circuit above, the trigger input is HIGH and a 22u and 100k are connected to the threshold pin (pin 6) of the chip.
When the power is connected, the trigger input will be high and the threshold line will be low. The internal circuitry of the chip will cause it to produce a HIGH and the Discharge pin will be effectively not connected.
The 22u will charge via the 100k and when pin 6 (threshold) sees 2/3 rail voltage, the output goes LOW and the discharge pin goes LOW and discharges the 22u.
This is how the chip sits – with the 22u discharged.
If the n.c. switch opens, the trigger input goes low. The output pin goes HIGH, the discharge pin goes high (it actually goes to a condition of high-impedance – or more accurately it goes to a state where it disconnects from the 100k and 22u) and the 22u charges via the 100k. When the threshold pin sees 2/3 rail voltage the output pin goes LOW and the chip remains in this state.
If the trigger line remains LOW, the output pin remains HIGH as the trigger pin controls the state of the output. This is most important to remember. But in our case the trigger line is connected via a 1u capacitor and it does not remain low. It has a short low period as determined by the timing of the 10k, 1u and 100k and ideally this low period is shorter than the timing on pin 6.

If the switch is kept open, the 1u will charge and it will take a short period of time for pin 2 to see a voltage 2/3 of rail voltage. Providing this time is shorter than the time-delay created by the 22u and 100k (it is), the timing will depend on the 22u and 100k, otherwise the 10k, 1u and 100k will create the time-delay.
To explain the trigger-line again:
When the switch is opened, the 1u will have no voltage across it (as it is discharged by the 100k when the switch is closed) and the 100k and 10k will form a voltage divider of approx 10:1 so that pin 2 will see a voltage less than 1v. This will start the time-delay of the chip and the 1u will charge via the 10k and 100k so that the voltage on pin 2 will rise at a rate allowed by these resistors. This means pin 2 (which is the CONTROLLER of the chip!!) will be at its high value VERY QUICKLY and will no longer control the chip. The chip will now be looking for a HIGH on the threshold line to perform the next part of the sequence.

 

[haxxx]

Indeed the brilliance is in the simplicity
Thanks a lot man, I appreciate it.
Haxxx