555 Timer Help

[Frosty_47]

Hello, I want to use 555 timer to generate a variable frequency waveform with a 50% duty cycle. Please tell me if this **broken link removed** makes sense.

Basically, the idea is for capacitor (C1) to charge through Rc+RV and discharge via Rd + RV. Since Rv is a 10K POT, I should be able to vary the frequency by adjusting it without affecting the duty cycle.

Does This make sence ?

Thanks

P.S. I apologies for the size of picture...(damn that scanner)

 

[raviram87]

i have enclosed below the circuit diagram of 555 timer in astable mode...

this circuit is good enough to generate a waveform with 50% duty cycle and above... however if u wih to have a waveform with a duty cycle less than 50%, you can use a small signal diode such as the 1N4148 and place it parallel to the resistor R2....

 

[raviram87]

T = 0.7 * (R1+2R2) * C1
where T is the time period of the waveform you desire to produce in seconds.

T = Tm + Ts

where Tm = output high during this time = 0.7 * (R1+R2) * C1
Ts = output low during this time = 0.7 * (R2) * C1


Duty Cycle = Tm / (Tm+Ts)

= (R1+R2) / (R1+2R2)

For 50% duty cycle Tm = Ts.

 

[Frosty_47]

i have enclosed below the circuit diagram of 555 timer in astable mode...

this circuit is good enough to generate a waveform with 50% duty cycle and above... however if u wih to have a waveform with a duty cycle less than 50%, you can use a small signal diode such as the 1N4148 and place it parallel to the resistor R2....

I don't see how your design will provide a 50% duty. Please Xplain...

 

[Roff]

Frosty, if the diode were ideal (zero forward voltage), that would work. However, when Rv is large, the drop across the diode is too low for it to conduct, so the resistor in parallel with it is still in the equation.
If you want variable frequency with 50% duty cycle, use a CMOS 555 (because its output swings rail-to-rail) with this circuit. Keep the resistor value large, so the pin 3 output resistance is insignificant.
The other way to do it, which yields even better results, is to use a variable-frequency 555 circuit with arbitrary duty cycle, then follow it with a toggle flip-flop (divide by 2).

 

[ericgibbs]

Frosty, The other way to do it, which yields even better results, is to use a variable-frequency 555 circuit with arbitrary duty cycle, then follow it with a toggle flip-flop (divide by 2).

Hi Frosty,
I would also do it this way, you are sure to get a 50/50 duty cycle throughout the 555 variable frequency range.

 

[Frosty_47]

Thank you Roff for your circuit suggestion and explaining. If I use a 6K resistor in series with a 50K POT, and a 0.01uF Cap, I should be getting around 1275Hz-11904Hz (or 637.5Hz-5952Hz after flip flop). Are theese resistor values high enough?

Thanks

 

[Roff]

Thank you Roff for your circuit suggestion and explaining. If I use a 6K resistor in series with a 50K POT, and a 0.01uF Cap, I should be getting around 1275Hz-11904Hz (or 637.5Hz-5952Hz after flip flop). Are theese resistor values high enough?

Thanks

That should be OK. Do you know how to do the toggle FF?

 

[Frosty_47]

That should be OK. Do you know how to do the toggle FF?

Well yes thats pretty simple. I can just use a JK FF with J=K=1

74LS76/54LS76 should do the job...

 

[Roff]

If you're using TTL, you don't need a CMOS 555, nor do you need the circuit in the link I posted (although it does have fewer parts).
Most 74LS TTL is only guaranteed to operate over the range 4.75 to 5.25V.

 

[Frosty_47]

Weird...

When I use multisim to test this **broken link removed** it gives me slightly different output frequency than calculatted (I used virtual components in the circuit). The period of waveform I am getting on osciloscope:

for 6k = 207.9uS = 4810Hz
56k = 1.6ms = 625Hz

5k = 168.0us = 5952.38Hz
55k = 1.5ms = 666.7Hz

How come the frequencies in Multisim do not agree with the calculatted, even though I use Ideal components ? Basically I should use a 5k in series with 50K POT to achieve roughly 600Hz-6Khz. Is the reading in multisim accurate ?

 

[shokjok]

You can try a 4027 or 4096 CMOS JK flip-flop to avoid voltage limits.