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555 monostable edge trigger

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confounded

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Hi, im reading about the 555 chip.
I have a monostable circuit and my book says in order to become an edge triggered device you add R1, C1 and D1 as i have in my rough sketch.

I just dont understand why you need the diode D1?

I see the capacitor C1 will make pin 2 low if input goes low, then C1 will recharge to take pin 2 high once more. The capacitor C1 is charged through R1 if input is still low.
Why do you need the diode?
 

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You don't "really" need the diode. It is included so the capacitor discharges quickly when the trigger line is taken HIGH. It all depends on the value of the capacitor and resistor and the timing of the trigger-line.
If the trigger line is low for a long period of time, the capacitor will charge and the 555 will operate (oscillate).
If the trigger line is now taken HIGH very quickly and the LOW, the capacitor may not have enough time to discharge though the resistor (if the diode is removed) and when the trigger line is taken LOW again, the charge on the capacitor will not deliver a LOW to the 555.
The diode immediately discharges the cap and makes sure pin 2 always sees a LOW.
 
You don't "really" need the diode. ...

You really DO need the diode! Without it, on the low-to-high transition of the RESET input, pin 2 on the 555 is driven to a voltage above the Vcc supply voltage. This injects current into pin 2 that might be sufficient to damage the chip, or in the case of the CMOS version of the 555, induce "latch-up".

Read the Spec sheet: The ABSOLUTE MAXIMUM voltage on the RESET pin not to exceed Vcc
Read the blue box in the attachment.
 

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Signetics invented the NE555.
In their datasheet and applications notes they show AC coupling to the trigger pin without a protection diode.
I think a protection diode is a good idea.
 
I suspect National uses the same technology for the LM555 as they do for the LM324. The LM324 can handle input voltages as high as 32V. The input stage looks like the trigger input of the LM555. Lateral PNP transistors have high base-emitter breakdown, and apparently there is no parasitic diode from the input to vcc.
TI must be using a different process. Or maybe they just included the Trigger input to avoid complication and confusion.
In order to be safe and make the circuit independent of manufacturer, I would include the diode - although a diode clamps the input to a diode drop above vcc, which still violates the TI spec.
 
thanks for replying guys, unfortunatly im still confused.

Can i just confirm with you the theory then;

At time = 0 using input is high, C1 is Vcc + 0.6V, pin 2 is Vcc + 0.6V, out = low

If input goes low: C1 discharges through R1? pin 2 is low, out = high

after discharging C1 is immediatly charged by Vcc through R1 upto Vcc +0.6V, pin 2 is high, out is then low after the period 1.1RtCt
 
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thanks for replying guys, unfortunatly im still confused.

Can i just confirm with you the theory then;

At time = 0 using input is high, C1 is Vcc + 0.6V, pin 2 is Vcc + 0.6V, out = low
No.
The input is at Vcc.

If input goes low: C1 discharges through R1? pin 2 is low, out = high
No. C1 charges through R1.
Yes, the output goes high during the timing period.

after discharging C1 is immediatly charged by Vcc through R1 upto Vcc +0.6V, pin 2 is high, out is then low after the period 1.1RtCt
No.
After triggering by the input going low, the input goes high and D1 quickly discharges C1. The trigger pin 2 voltage is clamped to Vcc + 0.6V while C1 is discharging.
The output went high when the input went low and the output goes low at the end of the timing period.
 
Thanks, i see why the diodes there but im still not confident on the time line...

just to make sure i've got it;

time = 0 input = Vcc (high), C1 = Vcc, pin 2 = Vcc, out = low

if input goes low; C1 charges through R1, pin2 goes from high to low, output goes high

When C1 is charged, pin 2 goes high

when input goes high again, C1 is discharged through D1 quickly, pin 2 is held at Vcc +0.6V while C1 discharges.

after the time period (1.1RtCt) output goes low.
 
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