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250mA constant current Laser Diode Driver

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ccurtis what do you think about the attached circuit? It is only the part which drives the LD. I have used a Variable resistor right after the RS as you can see, and a Test resistor in place of the LD. By trimming the RS i get from 0-5 volt, and from 0-250mA at the outpu. Atleast in the software i get these values. Do you think in practice it will be correct? I am using a 100R variable resistor.

Thanks

It looks okay. It doesn't have the protective components for overvoltage transients, so you might apply the supply voltage gradually instead.
 
It looks okay. It doesn't have the protective components for overvoltage transients, so you might apply the supply voltage gradually instead.

Hi ccurtis. I will also include the Voltage regulators and the rest of the circuit for protection. I just designed that circuit to show what i get by including the Trimmer right after the Rs. I will put it in practice tomorrow and hope that it will work.

Thanks ccurtis. I will come back to you when i will test it tomorrow.
 
It looks okay. It doesn't have the protective components for overvoltage transients, so you might apply the supply voltage gradually instead.

Hi ccurtis. I ve managed to built the circuit and got 0-250mA output. I am using the IRF9520 P chanel MOSFET. To test the output I m using 10R, 15R, 20R, 22R, 33R,and 47R test resistors. Firstly, I set the current to 100mA using the 10R test resistor, and then I checked the performance (constant) of the circuit by testing all of the above resistors as load. The current stays constant with all the test resistors but when i am increasing the current above 180mA then is not constant with all the test resistors. Only with the 10, 15, and 20R the current stays constant otherwise it drops. I replaced the IRF9520 with the BS250P MOSFET and the performance is better up to 220mA but the issue is that the MOSFET gets really hot and i cant use any heat sink because of its plastic case. As an op-amp I am using the TLC073AID, or the OPA270 or LF412CN ( i tried all three to see if the performance of the circuit its getting better but i found out that the performance its about the same) so i think i need a better transistor.

What do you think about all i wrote? Are the values of the test resistors okay that i am using? Is it normal that the current drops as i increase the resistance (Load)? Do you recomend any transistor that i can buy from RS electronics or Farnell uk?

Also i added capacitor C4 and Resistor R5 so i will achieve a soft start on the diode.

Please see attached the schematic diagram.

View attachment 64893

Also I need a circuit (comparator maybe) that will turn off the op-amp in case that the current exceeds the 250mA. On the shematic diagram is the U4A. Do you think it is correct? I controll the reference input (2.5V) with a regulator and the inverting input to the Rs. and with a transistor to switch off the op-amp U1B in case that the current exceeds the 250mA. Do you think that it is correct?

Thanks ccurtis for your help so far.
 
I'm happy to hear of your progress. Realize that when you use test resistors, it's not the same as using a LD. When you use a test resistor the voltage developed across the test resistor is the current through the test resistor times the value of the test resistor. However, the voltage across the LD will never exceed approx 2V. The highest voltage the circuit can deliver across the load is, at best 8.6 - 2.5= 6.1 volts. The actual voltage the circuit can deliver to the load will be less than 6.1V due to minimum resistance of the FET, the threshold voltage of the FET, other FET characteristics, and the minimum voltage the op amp can provide. So, if you set the current to 250 mA and your test resistor is 25 ohms, the voltage drop required across the test resistor is .25 * 25 = 6.25V, which is a voltage greater than the circuit can deliver to the load, and so, the current will fall below the value you set it at -- as you indeed discovered. Try using three ordinary silicon diodes in series instead of test resistors to simulate the LD, and then adjust your current to test the current through the load. Use the IRF9520 and mount it to a heat sink to keep it cool. You should not need a large heat sink, as the power it has to dissipate is about 1 watt.

I wouldn't use C4 where you added it. It will result in a large spike of current through the LD because the reference voltage at the + input of U1 will take a long time time to reach steady state level. I realize that you have a comparator there, presumably to prevent turn on for a while, but why put a current spike in there only to use a comparator to quench it? I'd use the configuration in the original schematic. The use of Q2 to disable the Op amp in your schematic doesn't look right at all, also.

The issue that the designer of the original schematic was most trying to address was the turn-on, transient spikes on the LD, not overcurrent protection.
 
I'm happy to hear of your progress. Realize that when you use test resistors, it's not the same as using a LD. When you use a test resistor the voltage developed across the test resistor is the current through the test resistor times the value of the test resistor. However, the voltage across the LD will never exceed approx 2V. The highest voltage the circuit can deliver across the load is, at best 8.6 - 2.5= 6.1 volts. The actual voltage the circuit can deliver to the load will be less than 6.1V due to minimum resistance of the FET, the threshold voltage of the FET, other FET characteristics, and the minimum voltage the op amp can provide. So, if you set the current to 250 mA and your test resistor is 25 ohms, the voltage drop required across the test resistor is .25 * 25 = 6.25V, which is a voltage greater than the circuit can deliver to the load, and so, the current will fall below the value you set it at -- as you indeed discovered. Try using three ordinary silicon diodes in series instead of test resistors to simulate the LD, and then adjust your current to test the current through the load. Use the IRF9520 and mount it to a heat sink to keep it cool. You should not need a large heat sink, as the power it has to dissipate is about 1 watt.

I wouldn't use C4 where you added it. It will result in a large spike of current through the LD because the reference voltage at the + input of U1 will take a long time time to reach steady state level. I realize that you have a comparator there, presumably to prevent turn on for a while, but why put a current spike in there only to use a comparator to quench it? I'd use the configuration in the original schematic. The use of Q2 to disable the Op amp in your schematic doesn't look right at all, also.

The issue that the designer of the original schematic was most trying to address was the turn-on, transient spikes on the LD, not overcurrent protection.

Thank you ccurtis for your help.

I will try to finilize it next week cause i have some other tasks to do now and i will come back to you to let you know how it is.

Thanks again for your valuable help
 
I'm happy to hear of your progress. Realize that when you use test resistors, it's not the same as using a LD. When you use a test resistor the voltage developed across the test resistor is the current through the test resistor times the value of the test resistor. However, the voltage across the LD will never exceed approx 2V. The highest voltage the circuit can deliver across the load is, at best 8.6 - 2.5= 6.1 volts. The actual voltage the circuit can deliver to the load will be less than 6.1V due to minimum resistance of the FET, the threshold voltage of the FET, other FET characteristics, and the minimum voltage the op amp can provide. So, if you set the current to 250 mA and your test resistor is 25 ohms, the voltage drop required across the test resistor is .25 * 25 = 6.25V, which is a voltage greater than the circuit can deliver to the load, and so, the current will fall below the value you set it at -- as you indeed discovered. Try using three ordinary silicon diodes in series instead of test resistors to simulate the LD, and then adjust your current to test the current through the load. Use the IRF9520 and mount it to a heat sink to keep it cool. You should not need a large heat sink, as the power it has to dissipate is about 1 watt.

I wouldn't use C4 where you added it. It will result in a large spike of current through the LD because the reference voltage at the + input of U1 will take a long time time to reach steady state level. I realize that you have a comparator there, presumably to prevent turn on for a while, but why put a current spike in there only to use a comparator to quench it? I'd use the configuration in the original schematic. The use of Q2 to disable the Op amp in your schematic doesn't look right at all, also.

The issue that the designer of the original schematic was most trying to address was the turn-on, transient spikes on the LD, not overcurrent protection.

Dear ccurtis, hope you are okay. Sorry for the delay but i was away and also working on different tasks and didnt have time to continue the current driver. I came up with a circuit that it is working, I uploaded the schematic but it is not the whole. it is also include overcurrent protection and ESD protection (i will upload the overall combined circuit when it is finilized).

I have a question: The first diagram (driver) the feedback to the inverting input of the U1 is from the source of the MOSFET. This way it is working very well but in case i will use a different Laser Diode the drop will change so the feedback to the U1 will change as well. So since I have included a current monitoring amplifier i was thinking that it would be better and more accurate if the feedback to the inverting input of the U1 was from the output of the current monitoring amplifier(picture driver1). Do you agree? So i tried that but it is not working. I dont get any output current. It sees that the MOSFET is closed and doesnt allow current to flow through to the load. What can i do to fix this problem and actuallyget the feedback from the output of the current monitoring amplifier to the inverting input of the U1?

Thanks

View attachment 66172
View attachment 66173
 
Hi there. First of all, how does the top schematic work to where you can monitor the current properly at J2? According to the data sheet for U5 you have the connections to pins 3 and 4 of U5 swapped from what they should be.

If I assume that is just a schematic error and you have those pins connected properly, then try swapping the connections to the (+) and (-) inputs of U1 in your bottom schematic. Do not test with a real LD until your get the values of the trimmers and current worked out. It looks like you are going to have in the neighborhood of 0.5 amps or more, which is too much current, right? For now, just see if the FET will conduct and regulate the current, regardless of the magnitude of the current.

Frankly, I still don't understand why you just don't use the top schematic. The current is already regulated without adding U5 into the feedback loop, which can only add a level of instability to the regulation of current. How much difference can there be in forward voltage from one LD to another?
 
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Hi there. First of all, how does the top schematic work to where you can monitor the current properly at J2? According to the data sheet for U5 you have the connections to pins 3 and 4 of U5 swapped from what they should be.

If I assume that is just a schematic error and you have those pins connected properly, then try swapping the connections to the (+) and (-) inputs of U1 in your bottom schematic. Do not test with a real LD until your get the values of the trimmers and current worked out. It looks like you are going to have in the neighborhood of 0.5 amps or more, which is too much current, right? For now, just see if the FET will conduct and regulate the current, regardless of the magnitude of the current.

Frankly, I still don't understand why you just don't use the top schematic. The current is already regulated without adding U5 into the feedback loop, which can only add a level of instability to the regulation of current. How much difference can there be in forward voltage from one LD to another?

Hi ccurtis, thanks for your reply. Sorry ccurtis that was a schematic error. The pins 3 and 4 of the U5 are the other way round connected so at the output of the U5 I can monitor the current in terms of voltage. for example when i have 1V at the output of the U5, I have 100mA to the Load. In this way i can easily see the current applied to the test resistor before I connect the LD.

When i started this design i just wanted to have maximum 250mA current but later on i decided to change it and be able to have more than that and set a current limit for protection. This design it works very nice, I have designed a comparator which controls a relay for switching on and off the circuit in case that the current exceeds the value that i set it.

I will try also to swap the connections of U1 and see what i will get. Do you think that is no point of doing that? and shall i stick with the top schematic? do you think is not much difference in forward voltage from on LD to another?

U5 is only added in order to be able to see the current and most importantly to get feedback into the comparator (which is not shown here) in order to switch off the circuit in case of an overcurrent.

Thanks for your help
 
I will try also to swap the connections of U1 and see what i will get. Do you think that is no point of doing that? and shall i stick with the top schematic? do you think is not much difference in forward voltage from on LD to another?

Kokos, from what I know the forward voltage drop for a variety of LDs is from 1.7V to 2.5 V -- not that wide a range. Your comparator idea with the forward current monitor is nice for indicating over-current to the operator. You could never switch the relay fast enough to prevent overcurrent damage to the LD. Damage can occur in a microsecond. It takes milliseconds to switch a relay. The original circuit (your first post) has protection features already. My choice would be to stay with the top schematic and incorporate the features you left out of the original schematic. If you just want to see the bottom circuit work, try swapping the connections to the input of U1.
 
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