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2-bit up/down counter using gates

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EngIntoHW

Member
Hey,

I was trying to design a 2-bit up/down counter using gates, and came up with the following design:

When SEL = 0 & CLK = 1 : Output <- Output + 1
When SEL = 1 & CLK = 1 : Output <- Output - 1
When CLK = 0 : Output remains unchanged.
*The DELAY block comprises even number of INV gates.
2-bit-up-down-counter-using-gates-png.46041


What is your opinion?
Will it work?

I'd also love to hear any other suggestions you might have.

Thank you :)
 

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MikeMl

Well-Known Member
Most Helpful Member
Here is how I would do it. I used a modified Johnson counter. It is synchronous, and Grey-code, so can be decoded glitchlessly. It counts up as long as UP is true, and counts down as long as UP is false. It changes state on rising edges of Clk.
 

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  • 2BitUD.png
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