18f14k50 pll

[AtomSoft]

PAGE 22 of datasheet states:

A Phase Locked Loop (PLL) circuit is provided as an
option for users who wish to use a lower-frequency
external oscillator or to operate at 32 MHz with the
HFINTOSC. The PLL is designed for an input
frequency from 4 MHz to 12 MHz. The PLL multiplies
its input frequency by a factor of four when the PLL is
enabled. This may be useful for customers who are
concerned with EMI, due to high-frequency crystals

So if i place a 10Mhz Crystal i should get 40Mhz correct?

 

[Nigel Goodwin]

Yes, it's basically there because you can't get higher frequency crystals - above a certain point they are only overtone ones.

 

[AtomSoft]

i had a feeling heh thanks a bunch and sorry for noobi questions here