16f vs 18f

[pixman]

I would like to know if the instruction BTFSS 3,0 is executed in the same way for 16f and 18f PICS.

 

[Ian Rogers]

BTFSS 3,0 is accessing the status bit on a pic16

The status register on a pic18 is high, 0xFD8 on a pic18f252.... BTFSS 3,0 on a pic18 will be access ram!

So The answer is No!!

 

[Nigel Goodwin]

Fairly obviously you should NEVER be using 'BTFSS 3,0', utterly pointless, confusing, and non-portable - use the correct mnemonics as you're supposed to (which makes the code 'portable-ish' as well.

 

[pixman]

Hi Nigel

It comes from your Tutorial 11.1 which converts the NumL and NumH to decimal.
Lb1:
addwf Ones,f
decf Tens,f
btfss 3,0
goto Lb1

How would you change this to work.

 

[granddad]

I coded as BTFSS STATUS,Z ; or C etc. ( always used uppercase for some reason ...)
<3 asm.

 

[pixman]

Tried all STATUS BITS Z, C ,DC, OV ,N , Non work.

 

[Ian Rogers]

Yeah Nigel!!!

(I hate when that happens )... LOL

 

[Ian Rogers]

PIC18's have branch instructions... BNC, BNN, BNZ etc...

When using Pic18 try this " BTFSS STATUS,C,0 " The command defaults to Access ram "0" SFR's and Access ram have bit access

 

[Nigel Goodwin]

Hi Nigel

It comes from your Tutorial 11.1 which converts the NumL and NumH to decimal.
Lb1:
addwf Ones,f
decf Tens,f
btfss 3,0
goto Lb1

How would you change this to work.

As the comments in the code explain, that routine was downloaded from the PICList

I'm pretty sure I've got a version somewhere that I converted for the 18F series though?, I'll see if I can find it tonight.

 

[Nigel Goodwin]

OK, took a bit of finding (as it was 2008), but here's TUT3.3 for an 18F2550 - the offending line was simply replaced by BTFSS STATUS, 0 - although it should really be BTFSS STATUS, C

 

[pixman]

I got it sorted out after a battle. I used the BTFSS STATUS,C but it would not register the overflow at the correct time.
The decf also affects the overflow bit C. So I swopped the addwf and decf around and its working now.

Lb1:
decf Tens,f
addwf Ones,f
btfss STATUS,0
goto Lb1

 

[Jon Wilder]

Nice that they have branch instructions. However, nothing beats having a compare, jump if not equal (cjne) like a good ol' 8051.

 

[Nigel Goodwin]

Nice that they have branch instructions. However, nothing beats having a compare, jump if not equal (cjne) like a good ol' 8051.

That's not a RISC processor though