;************************************* ; Author : Mike Baird ; Program : UART ; Date : September 7th,2009 ;************************************* List P=16F628 #include "P16F628.INC" __config _PWRTE_ON & _WDT_OFF & _INTRC_OSC_NOCLKOUT & _BODEN_ON & _LVP_OFF & _CP_OFF & _MCLRE_OFF ;*** Cblock *** CBLOCK 0x20 ; General purpose registers Count1 ; For Delay Count2 ; Count3 ; ENDC ;*** Start of Ram *** Org 0x000 ; GOTO Start ; Org 0x004 ; ;*** Start CLRF PORTA ; PortA all low CLRF PORTB ; PortB all low MOVLW 0x07 ; Turn comparators off and enable pins for I/O MOVWF CMCON ; BSF STATUS,RP0 ; Bank 1 CLRF TRISA ; PortA all output MOVLW b'00000110' ; PortB Pin 1:2 must be input MOVWF TRISB ; ;*** UART Set Up *** MOVLW 0x19 ; 0x19 = 9600 BPS (0x0C = 19200 BPS) MOVWF SPBRG ; Baud Rate Generator Store Location BSF TXSTA,TXEN ; Transmit Enable bit BSF TXSTA,BRGH ; High Baud Rate Select bit BCF STATUS,RP0 ; Bank 0 BSF RCSTA,SPEN ; Serial Port Enable bit BSF RCSTA,CREN ; Continuous Receive Enable bit ;*** Main *** CALL Message ; Send "16F628 Alive!" Main: CALL Receive ; Wait for a character CALL Send ; Send it back! GOTO Main ; ;*** Receive *** Receive: BTFSS PIR1,RCIF ; P1R1 is set when byte is recieved GOTO Receive ; MOVF RCREG,W ; Move received data into W RETURN ;*** Send *** Send: MOVWF TXREG ; Load W into TXREG BSF STATUS,RP0 ; RAM Page 1 Wait: btfss TXSTA,TRMT ; Transmission is complete when High GOTO Wait ; BCF STATUS,RP0 ; RAM Page 0 RETURN ;*** Message *** Message: MOVLW '1' CALL Send MOVLW '6' CALL Send MOVLW 'F' CALL Send MOVLW '6' CALL Send MOVLW '2' CALL Send MOVLW '8' CALL Send MOVLW ' ' CALL Send MOVLW 'A' CALL Send MOVLW 'l' CALL Send MOVLW 'i' CALL Send MOVLW 'v' CALL Send MOVLW 'e' CALL Send MOVLW '!' CALL Send RETURN END ;************************************************************************************************* ; TXSTA – TRANSMIT STATUS AND CONTROL REGISTER (ADDRESS: 98h Bank 1) ; Bit7 = CSRC:Clock source Select Bit (Don't Care for Async) ; Bit6 = TX9 :9-bit Transmit Enable bit (0 = 8 bit) ; Bit5 = TXEN:Transmit Enable bit (1 = On) ; Bit4 = SYNC:USART Mode Select bit (0 = Async) ; Bit3 = Unimplemented: Read as ‘0’ ; Bit2 = BRGH: High Baud Rate Select bit (1 = High Speed) ; Bit1 = TRMT: Transmit Shift Register Status bit (0 = TSR Full) ; Bit0 = TX9D: 9th bit of transmit data. Can be parity bit. ; ; ; RCSTA – RECEIVE STATUS AND CONTROL REGISTER (ADDRESS: 18h Bank 0) ; Bit7 = SPEN: Serial Port Enable bit (1 = Serial port enabled) ; Bit6 = RX9 : 9-bit Receive Enable bit (0 = Selects 8 bit reception) ; Bit5 = SREN: Single Receive Enable bit (Don't Care for Async) ; Bit4 = CREN: Continuous Receive Enable bit (1 = Enables continuous receive) ; Bit3 = ADEN: Address Detect Enable bit (Set as 0 for 8 bit Async) ; Bit2 = FERR: Framing Error bit (1 = Framing Error) ; Bit1 = OERR: Overrun Error bit (1 = Overrun Error) ; Bit0 = RX9D: 9th bit of received data ; ; ; Baud Rate = FOSC/(16(X+1)) for High Speed ; Baud Rate = FOSC/(64(X+1)) for Low Speed ; ; ; Follow these steps when setting up an Asynchronous Transmission: ; 1. TRISB<1> and TRISB<2> should both be set to ‘1’ to configure the RB1/RX/DT and RB2/TX/CK ; pins as inputs. Output drive, when required, is controlled by the peripheral circuitry. ; 2. Initialize the SPBRG register for the appropriate baud rate. If a high-speed baud rate is desired, set bit BRGH. ; 3. Enable the asynchronous serial port by clearing bit SYNC and setting bit SPEN. ; 4. If interrupts are desired, then set enable bit TXIE. ; 5. If 9-bit transmission is desired, then set transmit bit TX9. ; 6. Enable the transmission by setting bit TXEN, which will also set bit TXIF. ; 7. If 9-bit transmission is selected, the ninth bit should be loaded in bit TX9D. ; 8. Load data to the TXREG register (starts transmission). ; ; ; Follow these steps when setting up an Asynchronous Reception: ; 1. TRISB<1> and TRISB<2> should both be set to ‘1’ to configure the RB1/RX/DT and RB2/TX/CK ; pins as inputs. Output drive, when required, is controlled by the peripheral circuitry. ; 2. Initialize the SPBRG register for the appropriate baud rate. If a high-speed baud rate is desired, ; 3. Enable the asynchronous serial port by clearing bit SYNC and setting bit SPEN. ; 4. If interrupts are desired, then set enable bit RCIE. ; 5. If 9-bit reception is desired, then set bit RX9. ; 6. Enable the reception by setting bit CREN. ; 7. Flag bit RCIF will be set when reception is complete and an interrupt will be generated if enable bit RCIE was set. ; 8. Read the RCSTA register to get the ninth bit (if enabled) and determine if any error occurred during reception. ; 9. Read the 8-bit received data by reading the RCREG register. ; 10. If an OERR error occurred, clear the error by clearing enable bit CREN. ; ; That's all folks! ;*************************************************************************************************************************