Hi all,

I got back to the Oshonsoft version of Tait parallel programmer that I slaughtered, and implemented the following suggestions I got here: I returned the Vdd switching transistor, and made sure pin 36 is connected to ground (just soldered it to the wronlgy connected 37, I hope that won't be a source of trouble) and I did the measurements as suggested by eblc1388 - here is what I measured (Note that I've used a 7407 in these measurements instead of a 7406):

Well, they seem to be switching OK like this, although I am not too happy about a 2.55 V low level, but well. Now the trouble comes with the LPT connected and driving the pins from a program.

And here is where the problem is, I guess - when we want to set the high voltages to all the LPT pins involved, Vpp switching transistor does not invert as it should ?! The interesting thing is, as soon as D0 or D1 go low, either of them, Vpp shows about 1.52 as it should for a high state of its LPT pin (again, just biffer from a 7407 and the transistor inverts once).

I mostly suspected the switching transistors, so I did some more measurements around them. Here is an image that I modified from the Oshonsoft schematic:

It is the same (apart from the base resistor) schematic for both Vpp and Vdd switches, I had removed the LED branch from both. The results are still with a 7407 (so just a buffer instead of invertor buffer):

Up to now, all looks fine - the numbers stay pretty much the same if either data or clock is turned on high. But, if *both* data and clock are turned on high, the last sitation where both Q(Vdd) and Q(Vpp) branch are driven by high LPT pins, now looks like this:

Again, it is the transistor Q in the Vpp branch that cannot stay turned off, as dictated by a high LPT pin in this case. Instead it turns on and saturates ? Also, notice that in this case Vbuf(Vdd) is 4.26 - smaller than the corresponding 4.95 when Vdd was off - but still enough to keep Q(Vdd) off. That is why the only logical thing I can think of as a reason for this, is that when all buffers try to provide a high level on their outputs, they increase the demand of the IC, and their output voltages drop slightly - which in the case of Q switching transistor for Vpp is enough to drive it into saturation (due to the higher power supply voltage). Maybe that means I have a bad IC ??? But then again, this only means that when Vdd and Vpp are low (out of programming mode) and if we set clock and data to 1, then Vpp will automatically turn on and drive the PIC into programming mode ??

So, I thought I could stabilise this by putting a bigger base resistor for Vpp, and it worked ... until I placed the PIC. Well, something most be horribly wrong here, but I simply have no idea what.. Hope some of you can give some suggestions..

Thanks for the advice so far

Cheers