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PIC16F627A/628A/648A
CP
_
_
_
_
CPD
LVP
BOREN
MCLRE
FOSC2
PWRTE
WDTE
F0SC1
F0SC0
bit 13
bit 0
bit 13:
CP
: Flash Program Memory Code Protection bit(2)
(PIC16F648A)
1 = Code protection off
0 = 0000h to 0FFFh code protected
(PIC16F628A)
1 = Code protection off
0 = 0000h to 07FFh code protected
(PIC16F627A)
1 = Code protection off
0 = 0000h to 03FFh code protected
bit 12-9:
Unimplemented
: Read as '0'
bit 8:
CPD
: Data Code Protection bit(3)
1 = Data memory code protection off
0 = Data memory code protected
bit 7:
LVP
: Low Voltage Programming Enable
1 = RB4/PGM pin has PGM function, low voltage programming enabled
0 = RB4/PGM is digital I/O, HV on
MCLR
must be used for programming
bit 6:
BOREN
: Brown-out Reset Enable bit (1)
1 = BOR Reset enabled
0 = BOR Reset disabled
bit 5:
MCLRE
: RA5/MCLR pin function select
1 = RA5/
MCLR
pin function is
MCLR
0 = RA5/
MCLR
pin function is digital Input,
MCLR
internally tied to VDD
bit 3:
PWRTEN
: Power-up Timer Enable bit (1)
1 = PWRT disabled
0 = PWRT enabled
bit 2:
WDTEN
: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
bit 4, 1-0:
FOSC2:FOSC0
: Oscillator Selection bits(4)
111 = RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN
110 = RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
100 = INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
011 = EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN
010 = HS oscillator: High speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
000 = LP oscillator: Low power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN
Note
:
1
:
2
:
3
:
4
:
Enabling Brown-out Reset does not automatically enable the Power-up Timer (PWRT) the way it did in the PIC16F627/628.
The code protection scheme has changed from the code protection scheme used in the PIC16F627/628. The entire Flash program memory needs to be bulk erased to set the CP bit, turning the code protection off. See Programming Specification DS41196 for details.
The entire data EEPROM needs to be bulk erased to set the CPD bit, turning the code protection off. See Programming Specification DS41196 for details.
When
MCLR
is asserted in INTOSC mode, the internal clock oscillator is disabled.
hello
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jakeselectronics@hotmail.com
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