* *$ *--------- * 74HC365 Hex Bus Drivers with 3-STATE Outputs * * The High-Speed CMOS Logic Data Book, 1988, TI * atl 7/18/89 Update interface and model names * rbh 11/11/92 Added bus I/O model * .subckt 74HC365 A1 A2 A3 A4 A5 A6 G1BAR G2BAR Y1 Y2 Y3 Y4 Y5 Y6 DPWR DGND + optional: DPWR=$G_DPWR DGND=$G_DGND + params: MNTYMXDLY=0 IO_LEVEL=0 UA nor(2) DPWR DGND + G1BAR G2BAR E + D0_GATE IO_HC IO_LEVEL={IO_LEVEL} U1 buf3a(6) DPWR DGND + A1 A2 A3 A4 A5 A6 + E + Y1 Y2 Y3 Y4 Y5 Y6 + D_HC365 IO_HC_BUS MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL} .ends * .model D_HC365 utgate ( + tplhty=12ns tplhmx=24ns + tphlty=12ns tphlmx=24ns + tpzhty=26ns tpzhmx=48ns + tpzlty=26ns tpzlmx=48ns + tphzty=21ns tphzmx=48ns + tplzty=21ns tplzmx=48ns + ) *$ *---------